-Added bsn_monitor and changed width of databuffers

applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/mmm_apertif_unb1_cor_mesh_ref.vhd

@@ -62,7 +62,9 @@
 --     reg_diagnostics_mosi      =>  reg_diagnostics_mosi,
 --     reg_diagnostics_miso      =>  reg_diagnostics_miso,
 --     reg_tr_nonbonded_mosi     =>  reg_tr_nonbonded_mosi,
---     reg_tr_nonbonded_miso     =>  reg_tr_nonbonded_miso
+--     reg_tr_nonbonded_miso     =>  reg_tr_nonbonded_miso,
+--     reg_bsn_monitor_mosi      =>  reg_bsn_monitor_mosi,
+--     reg_bsn_monitor_miso      =>  reg_bsn_monitor_miso
 --   );
 -- 
 LIBRARY IEEE, common_lib, unb1_board_lib, mm_lib, eth_lib, technology_lib, tech_tse_lib;
@@ -127,7 +129,9 @@ ENTITY mmm_apertif_unb1_cor_mesh_ref IS
     reg_diagnostics_mosi      : OUT t_mem_mosi;
     reg_diagnostics_miso      : IN  t_mem_miso := c_mem_miso_rst;
     reg_tr_nonbonded_mosi     : OUT t_mem_mosi;
-    reg_tr_nonbonded_miso     : IN  t_mem_miso := c_mem_miso_rst
+    reg_tr_nonbonded_miso     : IN  t_mem_miso := c_mem_miso_rst;
+    reg_bsn_monitor_mosi      : OUT t_mem_mosi;
+    reg_bsn_monitor_miso      : IN  t_mem_miso := c_mem_miso_rst
   );
 END ENTITY mmm_apertif_unb1_cor_mesh_ref;
 
@@ -210,19 +214,22 @@ ARCHITECTURE str OF mmm_apertif_unb1_cor_mesh_ref IS
       ram_diag_bg_writedata_export          : out std_logic_vector(31 downto 0);
       reg_diag_data_buf_re_writedata_export : out std_logic_vector(31 downto 0);
       reg_diag_data_buf_re_address_export   : out std_logic;
+      reg_bsn_monitor_reset_export          : out std_logic;
       eth1g_tse_write_export                : out std_logic;
-      ram_diag_data_buf_re_address_export   : out std_logic_vector(9 downto 0);
+      ram_diag_data_buf_re_address_export   : out std_logic_vector(5 downto 0);
       reg_unb_sens_readdata_export          : in  std_logic_vector(31 downto 0) := (others => '0');
+      reg_bsn_monitor_write_export          : out std_logic;
       pio_pps_clk_export                    : out std_logic;
       ram_diag_data_buf_re_read_export      : out std_logic;
       eth1g_reg_address_export              : out std_logic_vector(3 downto 0);
       ram_diag_data_buf_re_readdata_export  : in  std_logic_vector(31 downto 0) := (others => '0');
       reg_diag_bg_address_export            : out std_logic_vector(2 downto 0);
       pio_system_info_readdata_export       : in  std_logic_vector(31 downto 0) := (others => '0');
-      ram_diag_data_buf_im_address_export   : out std_logic_vector(9 downto 0);
+      ram_diag_data_buf_im_address_export   : out std_logic_vector(5 downto 0);
       rom_system_info_writedata_export      : out std_logic_vector(31 downto 0);
       reg_tr_nonbonded_reset_export         : out std_logic;
       ram_diag_data_buf_im_writedata_export : out std_logic_vector(31 downto 0);
+      reg_bsn_monitor_read_export           : out std_logic;
       reg_tr_nonbonded_address_export       : out std_logic_vector(3 downto 0);
       reg_wdi_address_export                : out std_logic;
       reg_diag_bg_clk_export                : out std_logic;
@@ -247,16 +254,19 @@ ARCHITECTURE str OF mmm_apertif_unb1_cor_mesh_ref IS
       ram_diag_data_buf_re_write_export     : out std_logic;
       pio_system_info_reset_export          : out std_logic;
       reg_wdi_writedata_export              : out std_logic_vector(31 downto 0);
+      reg_bsn_monitor_writedata_export      : out std_logic_vector(31 downto 0);
       pio_system_info_read_export           : out std_logic;
+      reg_bsn_monitor_address_export        : out std_logic_vector(4 downto 0);
       reg_diag_data_buf_im_readdata_export  : in  std_logic_vector(31 downto 0) := (others => '0');
       reg_wdi_clk_export                    : out std_logic;
       reg_diag_bg_write_export              : out std_logic;
       ram_diag_data_buf_im_write_export     : out std_logic;
       reg_diag_data_buf_im_address_export   : out std_logic;
-      eth1g_mm_rst_export                   : out std_logic;
       reg_diagnostics_read_export           : out std_logic;
+      eth1g_mm_rst_export                   : out std_logic;
       reg_diagnostics_reset_export          : out std_logic;
       out_port_from_the_pio_wdi             : out std_logic;
+      reg_bsn_monitor_clk_export            : out std_logic;
       eth1g_reg_write_export                : out std_logic;
       reg_diag_bg_readdata_export           : in  std_logic_vector(31 downto 0) := (others => '0');
       rom_system_info_readdata_export       : in  std_logic_vector(31 downto 0) := (others => '0');
@@ -267,6 +277,7 @@ ARCHITECTURE str OF mmm_apertif_unb1_cor_mesh_ref IS
       pio_system_info_clk_export            : out std_logic;
       eth1g_tse_waitrequest_export          : in  std_logic := '0';
       pio_pps_writedata_export              : out std_logic_vector(31 downto 0);
+      reg_bsn_monitor_readdata_export       : in  std_logic_vector(31 downto 0) := (others => '0');
       eth1g_mm_clk_export                   : out std_logic;
       rom_system_info_reset_export          : out std_logic;
       reg_unb_sens_address_export           : out std_logic_vector(2 downto 0);
@@ -318,6 +329,8 @@ BEGIN
           PORT MAP(mm_rst, mm_clk, reg_diagnostics_mosi, reg_diagnostics_miso );
     u_mm_file_reg_tr_nonbonded  :  mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_TR_NONBONDED")
           PORT MAP(mm_rst, mm_clk, reg_tr_nonbonded_mosi, reg_tr_nonbonded_miso );
+    u_mm_file_reg_bsn_monitor  :  mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_BSN_MONITOR")
+          PORT MAP(mm_rst, mm_clk, reg_bsn_monitor_mosi, reg_bsn_monitor_miso );
     ----------------------------------------------------------------------------
     -- 1GbE setup sequence normally performed by unb_os@NIOS
     ----------------------------------------------------------------------------
@@ -402,20 +415,27 @@ BEGIN
       ram_diag_bg_reset_export              => OPEN,
       ram_diag_bg_write_export              => ram_diag_bg_mosi.wr,
       ram_diag_bg_writedata_export          => ram_diag_bg_mosi.wrdata(c_word_w-1 DOWNTO 0),
-      ram_diag_data_buf_im_address_export   => ram_diag_data_buf_im_mosi.address(9 DOWNTO 0),
+      ram_diag_data_buf_im_address_export   => ram_diag_data_buf_im_mosi.address(5 DOWNTO 0),
       ram_diag_data_buf_im_clk_export       => OPEN,
       ram_diag_data_buf_im_read_export      => ram_diag_data_buf_im_mosi.rd,
       ram_diag_data_buf_im_readdata_export  => ram_diag_data_buf_im_miso.rddata(c_word_w-1 DOWNTO 0),
       ram_diag_data_buf_im_reset_export     => OPEN,
       ram_diag_data_buf_im_write_export     => ram_diag_data_buf_im_mosi.wr,
       ram_diag_data_buf_im_writedata_export => ram_diag_data_buf_im_mosi.wrdata(c_word_w-1 DOWNTO 0),
-      ram_diag_data_buf_re_address_export   => ram_diag_data_buf_re_mosi.address(9 DOWNTO 0),
+      ram_diag_data_buf_re_address_export   => ram_diag_data_buf_re_mosi.address(5 DOWNTO 0),
       ram_diag_data_buf_re_clk_export       => OPEN,
       ram_diag_data_buf_re_read_export      => ram_diag_data_buf_re_mosi.rd,
       ram_diag_data_buf_re_readdata_export  => ram_diag_data_buf_re_miso.rddata(c_word_w-1 DOWNTO 0),
       ram_diag_data_buf_re_reset_export     => OPEN,
       ram_diag_data_buf_re_write_export     => ram_diag_data_buf_re_mosi.wr,
       ram_diag_data_buf_re_writedata_export => ram_diag_data_buf_re_mosi.wrdata(c_word_w-1 DOWNTO 0),
+      reg_bsn_monitor_address_export        => reg_bsn_monitor_mosi.address(4 DOWNTO 0),
+      reg_bsn_monitor_clk_export            => OPEN,
+      reg_bsn_monitor_read_export           => reg_bsn_monitor_mosi.rd,
+      reg_bsn_monitor_readdata_export       => reg_bsn_monitor_miso.rddata(c_word_w-1 DOWNTO 0),
+      reg_bsn_monitor_reset_export          => OPEN,
+      reg_bsn_monitor_write_export          => reg_bsn_monitor_mosi.wr,
+      reg_bsn_monitor_writedata_export      => reg_bsn_monitor_mosi.wrdata(c_word_w-1 DOWNTO 0),
       reg_diag_bg_address_export            => reg_diag_bg_mosi.address(2 DOWNTO 0),
       reg_diag_bg_clk_export                => OPEN,
       reg_diag_bg_read_export               => reg_diag_bg_mosi.rd,