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Commit edadd43e authored by Reinier van der Walle's avatar Reinier van der Walle
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Merge branch 'L2SDP-297' into L2SDP-291

parents 594448ae 106805ab
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1 merge request!191Resolve L2SDP-291
Pipeline #23500 passed
Pipeline: sdptr

#23501

    ......@@ -50,7 +50,8 @@ ENTITY node_sdp_correlator IS
    in_sosi_arr : IN t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0);
    xst_udp_sosi : OUT t_dp_sosi;
    xst_udp_siso : IN t_dp_siso;
    from_ri_sosi : IN t_dp_sosi := c_dp_sosi_rst;
    to_ri_sosi : OUT t_dp_sosi;
    mm_rst : IN STD_LOGIC;
    mm_clk : IN STD_LOGIC;
    ......@@ -91,6 +92,11 @@ ARCHITECTURE str OF node_sdp_correlator IS
    SIGNAL quant_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
    SIGNAL dp_bsn_sync_scheduler_src_out : t_dp_sosi := c_dp_sosi_rst;
    SIGNAL xsel_sosi : t_dp_sosi := c_dp_sosi_rst;
    SIGNAL local_sosi : t_dp_sosi := c_dp_sosi_rst;
    SIGNAL ring_mux_sosi : t_dp_sosi := c_dp_sosi_rst;
    SIGNAL rx_sosi_sosi : t_dp_sosi := c_dp_sosi_rst;
    SIGNAL crosslets_sosi_arr : t_dp_sosi_arr(g_P_sq-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
    SIGNAL crosslets_mosi_arr : t_mem_mosi_arr(g_P_sq-1 DOWNTO 0) := (OTHERS => c_mem_mosi_rst);
    SIGNAL crosslets_miso_arr : t_mem_miso_arr(g_P_sq-1 DOWNTO 0) := (OTHERS => c_mem_miso_rst);
    ......@@ -154,17 +160,61 @@ BEGIN
    ---------------------------------------------------------------
    -- Repack 32b to 64b
    ---------------------------------------------------------------
    -- Not implemented yet
    u_dp_repack_data_local : ENTITY dp_lib.dp_repack_data
    GENERIC MAP (
    g_in_dat_w => c_word_w,
    g_in_nof_words => c_longword_sz/c_word_sz,
    g_out_dat_w => c_longword_w,
    g_out_nof_words => 1
    )
    PORT MAP (
    rst => dp_rst,
    clk => dp_clk,
    snk_in => xsel_sosi,
    src_out => local_sosi
    );
    ---------------------------------------------------------------
    -- ring_mux
    ---------------------------------------------------------------
    -- Not implemented yet
    u_ring_mux : ENTITY ring_lib.ring_mux
    GENERIC MAP (
    g_bsn_w => c_longword_w, -- TODO Correct these generics!
    g_data_w => c_longword_w,
    g_in_chanel_w => c_word_w,
    g_error_w => c_word_w,
    g_fifo_size => array_init(1024, 2)
    )
    PORT MAP (
    dp_clk => dp_clk,
    dp_rst => dp_rst,
    remote_sosi => from_ri_sosi,
    local_sosi => local_sosi,
    mux_sosi => ring_mux_sosi
    );
    to_ri_sosi <= ring_mux_sosi;
    ---------------------------------------------------------------
    -- Repack 64b to 32b
    ---------------------------------------------------------------
    -- Not implemented yet
    u_dp_repack_data_rx : ENTITY dp_lib.dp_repack_data
    GENERIC MAP (
    g_in_dat_w => c_longword_w,
    g_in_nof_words => 1,
    g_out_dat_w => c_word_w,
    g_out_nof_words => c_longword_sz/c_word_sz
    )
    PORT MAP (
    rst => dp_rst,
    clk => dp_clk,
    snk_in => xsel_sosi,
    src_out => local_sosi
    );
    ---------------------------------------------------------------
    -- dp_demux
    ......
    ......@@ -6,6 +6,7 @@ hdl_lib_technology =
    synth_files =
    src/vhdl/ring_pkg.vhd
    src/vhdl/ring_mux.vhd
    src/vhdl/ring_lane_info_reg.vhd
    src/vhdl/ring_lane_info.vhd
    src/vhdl/ring_info.vhd
    ......
    -------------------------------------------------------------------------------
    --
    -- Copyright 2021
    -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
    -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
    --
    -- Licensed under the Apache License, Version 2.0 (the "License");
    -- you may not use this file except in compliance with the License.
    -- You may obtain a copy of the License at
    --
    -- http://www.apache.org/licenses/LICENSE-2.0
    --
    -- Unless required by applicable law or agreed to in writing, software
    -- distributed under the License is distributed on an "AS IS" BASIS,
    -- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    -- See the License for the specific language governing permissions and
    -- limitations under the License.
    --
    -------------------------------------------------------------------------------
    -------------------------------------------------------------------------------
    --
    -- Author: R. van der Walle
    -- Purpose: Implement the function of ring_mux.
    -- Description: See https://support.astron.nl/confluence/x/jyu7Ag
    -------------------------------------------------------------------------------
    LIBRARY IEEE, common_lib, mm_lib, dp_lib;
    USE IEEE.STD_LOGIC_1164.ALL;
    USE common_lib.common_pkg.ALL;
    USE common_lib.common_mem_pkg.ALL;
    USE common_lib.common_field_pkg.ALL;
    USE dp_lib.dp_stream_pkg.ALL;
    ENTITY ring_mux IS
    GENERIC (
    g_bsn_w : NATURAL := 16;
    g_data_w : NATURAL := 16;
    g_empty_w : NATURAL := 1;
    g_in_channel_w : NATURAL := 1;
    g_error_w : NATURAL := 1;
    g_use_bsn : BOOLEAN := TRUE;
    g_use_empty : BOOLEAN := TRUE;
    g_use_error : BOOLEAN := TRUE;
    g_use_sync : BOOLEAN := TRUE;
    g_fifo_size : t_natural_arr := array_init(1024, 2) -- must match c_nof_input
    );
    PORT (
    -- Clocks and reset
    dp_clk : IN STD_LOGIC;
    dp_rst : IN STD_LOGIC;
    remote_sosi : IN t_dp_sosi := c_dp_sosi_rst;
    remote_siso : OUT t_dp_siso;
    local_sosi : IN t_dp_sosi := c_dp_sosi_rst;
    local_siso : OUT t_dp_siso;
    mux_sosi : OUT t_dp_sosi;
    mux_siso : IN t_dp_siso := c_dp_siso_rdy;
    );
    END ring_mux;
    ARCHITECTURE str OF ring_mux IS
    CONSTANT c_nof_input : NATURAL := 2;
    SIGNAL dp_mux_in_sosi_arr : t_dp_sosi_arr(0 TO c_nof_input-1);
    SIGNAL dp_mux_in_siso_arr : t_dp_siso_arr(0 TO c_nof_input-1);
    BEGIN
    -- rewire dp_mux inputs
    dp_mux_in_sosi_arr(0) <= local_sosi;
    dp_mux_in_sosi_arr(1) <= remote_sosi;
    local_siso <= dp_mux_in_siso_arr(0);
    remote_siso <= dp_mux_in_siso_arr(1);
    u_dp_mux : ENTITY dp_lib.dp_mux
    GENERIC MAP (
    g_nof_input => c_nof_input,
    g_append_channel_lo => FALSE, -- Keep channels the same as the input.
    g_use_fifo => TRUE,
    g_bsn_w => g_bsn_w,
    g_data_w => g_data_w,
    g_empty_w => g_empty_w,
    g_in_channel_w => g_channel_w,
    g_error_w => g_error_w,
    g_use_bsn => g_use_bsn,
    g_use_empty => g_use_empty,
    g_use_in_channel => TRUE,
    g_use_error => g_use_error,
    g_use_sync => g_use_sync,
    g_fifo_size => g_fifo_size
    )
    PORT MAP (
    dp_rst => dp_rst,
    dp_clk => dp_clk,
    snk_out_arr => dp_mux_in_siso_arr;
    snk_in_arr => dp_mux_in_sosi_arr;
    src_in => mux_siso;
    src_out => mux_sosi
    );
    END str;
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