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Commit 106805ab authored by Reinier van der Walle's avatar Reinier van der Walle
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added ring_mux

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1 merge request!191Resolve L2SDP-291
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-------------------------------------------------------------------------------
--
-- Copyright 2021
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
--
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
-- Author: R. van der Walle
-- Purpose: Implement the function of ring_mux.
-- Description: See https://support.astron.nl/confluence/x/jyu7Ag
-------------------------------------------------------------------------------
LIBRARY IEEE, common_lib, mm_lib, dp_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE common_lib.common_field_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
ENTITY ring_mux IS
GENERIC (
g_bsn_w : NATURAL := 16;
g_data_w : NATURAL := 16;
g_empty_w : NATURAL := 1;
g_in_channel_w : NATURAL := 1;
g_error_w : NATURAL := 1;
g_use_bsn : BOOLEAN := TRUE;
g_use_empty : BOOLEAN := TRUE;
g_use_error : BOOLEAN := TRUE;
g_use_sync : BOOLEAN := TRUE;
g_fifo_size : t_natural_arr := array_init(1024, 2) -- must match c_nof_input
);
PORT (
-- Clocks and reset
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
remote_sosi : IN t_dp_sosi := c_dp_sosi_rst;
remote_siso : OUT t_dp_siso;
local_sosi : IN t_dp_sosi := c_dp_sosi_rst;
local_siso : OUT t_dp_siso;
mux_sosi : OUT t_dp_sosi;
mux_siso : IN t_dp_siso := c_dp_siso_rdy;
);
END ring_mux;
ARCHITECTURE str OF ring_mux IS
CONSTANT c_nof_input : NATURAL := 2;
SIGNAL dp_mux_in_sosi_arr : t_dp_sosi_arr(0 TO c_nof_input-1);
SIGNAL dp_mux_in_siso_arr : t_dp_siso_arr(0 TO c_nof_input-1);
BEGIN
-- rewire dp_mux inputs
dp_mux_in_sosi_arr(0) <= local_sosi;
dp_mux_in_sosi_arr(1) <= remote_sosi;
local_siso <= dp_mux_in_siso_arr(0);
remote_siso <= dp_mux_in_siso_arr(1);
u_dp_mux : ENTITY dp_lib.dp_mux
GENERIC MAP (
g_nof_input => c_nof_input,
g_append_channel_lo => FALSE, -- Keep channels the same as the input.
g_use_fifo => TRUE,
g_bsn_w => g_bsn_w,
g_data_w => g_data_w,
g_empty_w => g_empty_w,
g_in_channel_w => g_channel_w,
g_error_w => g_error_w,
g_use_bsn => g_use_bsn,
g_use_empty => g_use_empty,
g_use_in_channel => TRUE,
g_use_error => g_use_error,
g_use_sync => g_use_sync,
g_fifo_size => g_fifo_size
)
PORT MAP (
dp_rst => dp_rst,
dp_clk => dp_clk,
snk_out_arr => dp_mux_in_siso_arr;
snk_in_arr => dp_mux_in_sosi_arr;
src_in => mux_siso;
src_out => mux_sosi
);
END str;
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