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RTSD
HDL
Commits
e3997c7b
Commit
e3997c7b
authored
6 years ago
by
Pieter Donker
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to fix tb failure, requantize not active anymore while in simulation mode
parent
34f59c47
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applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd
+31
-24
31 additions, 24 deletions
...ries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd
with
31 additions
and
24 deletions
applications/arts/libraries/arts_tab_beamformer/src/vhdl/arts_tab_beamformer.vhd
+
31
−
24
View file @
e3997c7b
...
@@ -189,33 +189,40 @@ BEGIN
...
@@ -189,33 +189,40 @@ BEGIN
src_out
=>
beamformer_src_out_arr
(
i
)
src_out
=>
beamformer_src_out_arr
(
i
)
);
);
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Requantize the outputs to the desired bit width
-- Requantize the outputs to the desired bit width
------------------------------------------------------------------------------
------------------------------------------------------------------------------
u_dp_requantize
:
ENTITY
dp_lib
.
dp_requantize
no_requantize
:
IF
g_sim
=
TRUE
GENERATE
GENERIC
MAP
(
src_out_arr
(
i
)
<=
beamformer_src_out_arr
(
i
);
-- no requantize in sim mode
g_complex
=>
TRUE
,
END
GENERATE
;
g_representation
=>
"UNSIGNED"
,
g_lsb_w
=>
c_lsb_w
-1
,
requantize
:
IF
g_sim
=
FALSE
GENERATE
g_lsb_round
=>
TRUE
,
u_dp_requantize
:
ENTITY
dp_lib
.
dp_requantize
g_lsb_round_clip
=>
FALSE
,
GENERIC
MAP
(
g_msb_clip
=>
TRUE
,
g_complex
=>
TRUE
,
g_msb_clip_symmetric
=>
FALSE
,
g_representation
=>
"UNSIGNED"
,
g_gain_w
=>
0
,
g_lsb_w
=>
c_lsb_w
-1
,
g_pipeline_remove_lsb
=>
1
,
g_lsb_round
=>
TRUE
,
g_pipeline_remove_msb
=>
0
,
g_lsb_round_clip
=>
FALSE
,
g_in_dat_w
=>
c_bf_out_w
,
g_msb_clip
=>
TRUE
,
g_out_dat_w
=>
g_out_data_w
g_msb_clip_symmetric
=>
FALSE
,
)
g_gain_w
=>
0
,
PORT
MAP
(
g_pipeline_remove_lsb
=>
1
,
rst
=>
dp_rst
,
g_pipeline_remove_msb
=>
0
,
clk
=>
dp_clk
,
g_in_dat_w
=>
c_bf_out_w
,
snk_in
=>
beamformer_src_out_arr
(
i
),
g_out_dat_w
=>
g_out_data_w
src_out
=>
src_out_arr
(
i
),
)
out_ovr
=>
OPEN
PORT
MAP
(
);
rst
=>
dp_rst
,
clk
=>
dp_clk
,
snk_in
=>
beamformer_src_out_arr
(
i
),
src_out
=>
src_out_arr
(
i
),
out_ovr
=>
OPEN
);
END
GENERATE
;
END
GENERATE
;
END
GENERATE
;
END
str
;
END
str
;
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