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Commit e3997c7b authored by Pieter Donker's avatar Pieter Donker
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to fix tb failure, requantize not active anymore while in simulation mode

parent 34f59c47
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......@@ -189,33 +189,40 @@ BEGIN
src_out => beamformer_src_out_arr(i)
);
------------------------------------------------------------------------------
-- Requantize the outputs to the desired bit width
------------------------------------------------------------------------------
u_dp_requantize : ENTITY dp_lib.dp_requantize
GENERIC MAP (
g_complex => TRUE,
g_representation => "UNSIGNED",
g_lsb_w => c_lsb_w-1,
g_lsb_round => TRUE,
g_lsb_round_clip => FALSE,
g_msb_clip => TRUE,
g_msb_clip_symmetric => FALSE,
g_gain_w => 0,
g_pipeline_remove_lsb => 1,
g_pipeline_remove_msb => 0,
g_in_dat_w => c_bf_out_w,
g_out_dat_w => g_out_data_w
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
snk_in => beamformer_src_out_arr(i),
src_out => src_out_arr(i),
out_ovr => OPEN
);
no_requantize : IF g_sim = TRUE GENERATE
src_out_arr(i) <= beamformer_src_out_arr(i); -- no requantize in sim mode
END GENERATE;
requantize : IF g_sim = FALSE GENERATE
u_dp_requantize : ENTITY dp_lib.dp_requantize
GENERIC MAP (
g_complex => TRUE,
g_representation => "UNSIGNED",
g_lsb_w => c_lsb_w-1,
g_lsb_round => TRUE,
g_lsb_round_clip => FALSE,
g_msb_clip => TRUE,
g_msb_clip_symmetric => FALSE,
g_gain_w => 0,
g_pipeline_remove_lsb => 1,
g_pipeline_remove_msb => 0,
g_in_dat_w => c_bf_out_w,
g_out_dat_w => g_out_data_w
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
snk_in => beamformer_src_out_arr(i),
src_out => src_out_arr(i),
out_ovr => OPEN
);
END GENERATE;
END GENERATE;
END str;
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