Skip to content
Snippets Groups Projects
Commit dc3a38d2 authored by Kenneth Hiemstra's avatar Kenneth Hiemstra
Browse files

ip_arria10_e1sg_jesd204b_ to Q18.0

parent 080cacd3
No related branches found
No related tags found
1 merge request!100Removed text for XSub that is now written in Confluence Subband correlator...
Showing
with 9220 additions and 29971 deletions
...@@ -26,13 +26,9 @@ quartus_qip_files = ...@@ -26,13 +26,9 @@ quartus_qip_files =
[generate_ip_libs] [generate_ip_libs]
qsys-generate_ip_files = qsys-generate_ip_files =
ip_arria10_e1sg_jesd204b_rx_200MHz.qsys
ip_arria10_e1sg_jesd204b_rx_200MHz.ip ip_arria10_e1sg_jesd204b_rx_200MHz.ip
ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qsys
ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip
ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
ip_arria10_e1sg_jesd204b_rx_reset_seq.ip ip_arria10_e1sg_jesd204b_rx_reset_seq.ip
ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip
ip_arria10_e1sg_jesd204b_tx.ip ip_arria10_e1sg_jesd204b_tx.ip
<?xml version="1.0" ?>
<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
<spirit:vendor>Intel Corporation</spirit:vendor>
<spirit:library>ip_arria10_e1sg_jesd204b_rx_reset_control_12_clock_in</spirit:library>
<spirit:name>clock_in</spirit:name>
<spirit:version>18.0</spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>in_clk</spirit:name>
<spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
<spirit:slave></spirit:slave>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>clk</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>in_clk</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>clockRate</spirit:name>
<spirit:displayName>Clock rate</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>externallyDriven</spirit:name>
<spirit:displayName>Externally driven</spirit:displayName>
<spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>ptfSchematicName</spirit:name>
<spirit:displayName>PTF schematic name</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>out_clk</spirit:name>
<spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
<spirit:master></spirit:master>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>clk</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>out_clk</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>associatedDirectClock</spirit:name>
<spirit:displayName>Associated direct clock</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="associatedDirectClock">in_clk</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>clockRate</spirit:name>
<spirit:displayName>Clock rate</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="clockRate">50000000</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>clockRateKnown</spirit:name>
<spirit:displayName>Clock rate known</spirit:displayName>
<spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>externallyDriven</spirit:name>
<spirit:displayName>Externally driven</spirit:displayName>
<spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>ptfSchematicName</spirit:name>
<spirit:displayName>PTF schematic name</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>QUARTUS_SYNTH</spirit:name>
<spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
<spirit:modelName>altera_clock_bridge</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>QUARTUS_SYNTH</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>in_clk</spirit:name>
<spirit:wire>
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName>STD_LOGIC</spirit:typeName>
<spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>out_clk</spirit:name>
<spirit:wire>
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName>STD_LOGIC</spirit:typeName>
<spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:vendorExtensions>
<altera:entity_info>
<spirit:vendor>Intel Corporation</spirit:vendor>
<spirit:library>ip_arria10_e1sg_jesd204b_rx_reset_control_12_clock_in</spirit:library>
<spirit:name>altera_clock_bridge</spirit:name>
<spirit:version>18.0</spirit:version>
</altera:entity_info>
<altera:altera_module_parameters>
<spirit:parameters>
<spirit:parameter>
<spirit:name>DERIVED_CLOCK_RATE</spirit:name>
<spirit:displayName>Derived clock rate</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="DERIVED_CLOCK_RATE">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>EXPLICIT_CLOCK_RATE</spirit:name>
<spirit:displayName>Explicit clock rate</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="EXPLICIT_CLOCK_RATE">50000000</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>NUM_CLOCK_OUTPUTS</spirit:name>
<spirit:displayName>Number of Clock Outputs</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="NUM_CLOCK_OUTPUTS">1</spirit:value>
</spirit:parameter>
</spirit:parameters>
</altera:altera_module_parameters>
<altera:altera_system_parameters>
<spirit:parameters>
<spirit:parameter>
<spirit:name>device</spirit:name>
<spirit:displayName>Device</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>deviceFamily</spirit:name>
<spirit:displayName>Device family</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>deviceSpeedGrade</spirit:name>
<spirit:displayName>Device Speed Grade</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>generationId</spirit:name>
<spirit:displayName>Generation Id</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>bonusData</spirit:name>
<spirit:displayName>bonusData</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="bonusData">bonusData
{
}
</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>hideFromIPCatalog</spirit:name>
<spirit:displayName>Hide from IP Catalog</spirit:displayName>
<spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>lockedInterfaceDefinition</spirit:name>
<spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
<name>in_clk</name>
<type>clock</type>
<isStart>false</isStart>
<ports>
<port>
<name>in_clk</name>
<role>clk</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
<assignmentValueMap/>
</assignments>
<parameters>
<parameterValueMap>
<entry>
<key>clockRate</key>
<value>0</value>
</entry>
<entry>
<key>externallyDriven</key>
<value>false</value>
</entry>
<entry>
<key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
<name>out_clk</name>
<type>clock</type>
<isStart>true</isStart>
<ports>
<port>
<name>out_clk</name>
<role>clk</role>
<direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
<assignmentValueMap/>
</assignments>
<parameters>
<parameterValueMap>
<entry>
<key>associatedDirectClock</key>
<value>in_clk</value>
</entry>
<entry>
<key>clockRate</key>
<value>50000000</value>
</entry>
<entry>
<key>clockRateKnown</key>
<value>true</value>
</entry>
<entry>
<key>externallyDriven</key>
<value>false</value>
</entry>
<entry>
<key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
</interfaces>
</boundaryDefinition>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>systemInfos</spirit:name>
<spirit:displayName>systemInfos</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
<connPtSystemInfos>
<entry>
<key>in_clk</key>
<value>
<connectionPointName>in_clk</connectionPointName>
<suppliedSystemInfos>
<entry>
<key>CLOCK_RATE</key>
<value>0</value>
</entry>
</suppliedSystemInfos>
<consumedSystemInfos/>
</value>
</entry>
<entry>
<key>out_clk</key>
<value>
<connectionPointName>out_clk</connectionPointName>
<suppliedSystemInfos/>
<consumedSystemInfos>
<entry>
<key>CLOCK_RATE</key>
<value>50000000</value>
</entry>
</consumedSystemInfos>
</value>
</entry>
</connPtSystemInfos>
</systemInfosDefinition>]]></spirit:value>
</spirit:parameter>
</spirit:parameters>
</altera:altera_system_parameters>
<altera:altera_interface_boundary>
<altera:interface_mapping altera:name="in_clk" altera:internal="clock_in.in_clk" altera:type="clock" altera:dir="end">
<altera:port_mapping altera:name="in_clk" altera:internal="in_clk"></altera:port_mapping>
</altera:interface_mapping>
<altera:interface_mapping altera:name="out_clk" altera:internal="clock_in.out_clk" altera:type="clock" altera:dir="start">
<altera:port_mapping altera:name="out_clk" altera:internal="out_clk"></altera:port_mapping>
</altera:interface_mapping>
</altera:altera_interface_boundary>
<altera:altera_has_warnings>false</altera:altera_has_warnings>
<altera:altera_has_errors>false</altera:altera_has_errors>
</spirit:vendorExtensions>
</spirit:component>
\ No newline at end of file
<?xml version="1.0" ?>
<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
<spirit:vendor>Intel Corporation</spirit:vendor>
<spirit:library>ip_arria10_e1sg_jesd204b_rx_reset_control_12_reset_in</spirit:library>
<spirit:name>reset_in</spirit:name>
<spirit:version>18.0</spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>clk</spirit:name>
<spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
<spirit:slave></spirit:slave>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>clk</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>clk</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>clockRate</spirit:name>
<spirit:displayName>Clock rate</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>externallyDriven</spirit:name>
<spirit:displayName>Externally driven</spirit:displayName>
<spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>ptfSchematicName</spirit:name>
<spirit:displayName>PTF schematic name</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>in_reset</spirit:name>
<spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
<spirit:slave></spirit:slave>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>reset</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>in_reset</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>associatedClock</spirit:name>
<spirit:displayName>Associated clock</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>synchronousEdges</spirit:name>
<spirit:displayName>Synchronous edges</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
<spirit:busInterface>
<spirit:name>out_reset</spirit:name>
<spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
<spirit:master></spirit:master>
<spirit:portMaps>
<spirit:portMap>
<spirit:logicalPort>
<spirit:name>reset</spirit:name>
</spirit:logicalPort>
<spirit:physicalPort>
<spirit:name>out_reset</spirit:name>
</spirit:physicalPort>
</spirit:portMap>
</spirit:portMaps>
<spirit:parameters>
<spirit:parameter>
<spirit:name>associatedClock</spirit:name>
<spirit:displayName>Associated clock</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>associatedDirectReset</spirit:name>
<spirit:displayName>Associated direct reset</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="associatedDirectReset">in_reset</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>associatedResetSinks</spirit:name>
<spirit:displayName>Associated reset sinks</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="associatedResetSinks">in_reset</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>synchronousEdges</spirit:name>
<spirit:displayName>Synchronous edges</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
</spirit:parameter>
</spirit:parameters>
</spirit:busInterface>
</spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>QUARTUS_SYNTH</spirit:name>
<spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
<spirit:modelName>altera_reset_bridge</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>QUARTUS_SYNTH</spirit:localName>
</spirit:fileSetRef>
</spirit:view>
</spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>clk</spirit:name>
<spirit:wire>
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName>STD_LOGIC</spirit:typeName>
<spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>in_reset</spirit:name>
<spirit:wire>
<spirit:direction>in</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName>STD_LOGIC</spirit:typeName>
<spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:name>out_reset</spirit:name>
<spirit:wire>
<spirit:direction>out</spirit:direction>
<spirit:wireTypeDefs>
<spirit:wireTypeDef>
<spirit:typeName>STD_LOGIC</spirit:typeName>
<spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
</spirit:wireTypeDef>
</spirit:wireTypeDefs>
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:model>
<spirit:vendorExtensions>
<altera:entity_info>
<spirit:vendor>Intel Corporation</spirit:vendor>
<spirit:library>ip_arria10_e1sg_jesd204b_rx_reset_control_12_reset_in</spirit:library>
<spirit:name>altera_reset_bridge</spirit:name>
<spirit:version>18.0</spirit:version>
</altera:entity_info>
<altera:altera_module_parameters>
<spirit:parameters>
<spirit:parameter>
<spirit:name>ACTIVE_LOW_RESET</spirit:name>
<spirit:displayName>Active low reset</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="ACTIVE_LOW_RESET">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>SYNCHRONOUS_EDGES</spirit:name>
<spirit:displayName>Synchronous edges</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="SYNCHRONOUS_EDGES">deassert</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>NUM_RESET_OUTPUTS</spirit:name>
<spirit:displayName>Number of reset outputs</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="NUM_RESET_OUTPUTS">1</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>USE_RESET_REQUEST</spirit:name>
<spirit:displayName>Use reset request signal</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="USE_RESET_REQUEST">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>SYNC_RESET</spirit:name>
<spirit:displayName>Use synchronous resets</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="SYNC_RESET">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>AUTO_CLK_CLOCK_RATE</spirit:name>
<spirit:displayName>Auto CLOCK_RATE</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="AUTO_CLK_CLOCK_RATE">50000000</spirit:value>
</spirit:parameter>
</spirit:parameters>
</altera:altera_module_parameters>
<altera:altera_system_parameters>
<spirit:parameters>
<spirit:parameter>
<spirit:name>device</spirit:name>
<spirit:displayName>Device</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>deviceFamily</spirit:name>
<spirit:displayName>Device family</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>deviceSpeedGrade</spirit:name>
<spirit:displayName>Device Speed Grade</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>generationId</spirit:name>
<spirit:displayName>Generation Id</spirit:displayName>
<spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>bonusData</spirit:name>
<spirit:displayName>bonusData</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="bonusData">bonusData
{
}
</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>hideFromIPCatalog</spirit:name>
<spirit:displayName>Hide from IP Catalog</spirit:displayName>
<spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>lockedInterfaceDefinition</spirit:name>
<spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
<name>clk</name>
<type>clock</type>
<isStart>false</isStart>
<ports>
<port>
<name>clk</name>
<role>clk</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
<assignmentValueMap/>
</assignments>
<parameters>
<parameterValueMap>
<entry>
<key>clockRate</key>
<value>0</value>
</entry>
<entry>
<key>externallyDriven</key>
<value>false</value>
</entry>
<entry>
<key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
<name>in_reset</name>
<type>reset</type>
<isStart>false</isStart>
<ports>
<port>
<name>in_reset</name>
<role>reset</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
<assignmentValueMap/>
</assignments>
<parameters>
<parameterValueMap>
<entry>
<key>associatedClock</key>
<value>clk</value>
</entry>
<entry>
<key>synchronousEdges</key>
<value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
<name>out_reset</name>
<type>reset</type>
<isStart>true</isStart>
<ports>
<port>
<name>out_reset</name>
<role>reset</role>
<direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
<assignmentValueMap/>
</assignments>
<parameters>
<parameterValueMap>
<entry>
<key>associatedClock</key>
<value>clk</value>
</entry>
<entry>
<key>associatedDirectReset</key>
<value>in_reset</value>
</entry>
<entry>
<key>associatedResetSinks</key>
<value>in_reset</value>
</entry>
<entry>
<key>synchronousEdges</key>
<value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
</interfaces>
</boundaryDefinition>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>systemInfos</spirit:name>
<spirit:displayName>systemInfos</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
<connPtSystemInfos>
<entry>
<key>clk</key>
<value>
<connectionPointName>clk</connectionPointName>
<suppliedSystemInfos>
<entry>
<key>CLOCK_RATE</key>
<value>50000000</value>
</entry>
</suppliedSystemInfos>
<consumedSystemInfos/>
</value>
</entry>
</connPtSystemInfos>
</systemInfosDefinition>]]></spirit:value>
</spirit:parameter>
</spirit:parameters>
</altera:altera_system_parameters>
<altera:altera_interface_boundary>
<altera:interface_mapping altera:name="clk" altera:internal="reset_in.clk" altera:type="clock" altera:dir="end">
<altera:port_mapping altera:name="clk" altera:internal="clk"></altera:port_mapping>
</altera:interface_mapping>
<altera:interface_mapping altera:name="in_reset" altera:internal="reset_in.in_reset" altera:type="reset" altera:dir="end">
<altera:port_mapping altera:name="in_reset" altera:internal="in_reset"></altera:port_mapping>
</altera:interface_mapping>
<altera:interface_mapping altera:name="out_reset" altera:internal="reset_in.out_reset" altera:type="reset" altera:dir="start">
<altera:port_mapping altera:name="out_reset" altera:internal="out_reset"></altera:port_mapping>
</altera:interface_mapping>
</altera:altera_interface_boundary>
<altera:altera_has_warnings>false</altera:altera_has_warnings>
<altera:altera_has_errors>false</altera:altera_has_errors>
</spirit:vendorExtensions>
</spirit:component>
\ No newline at end of file
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment