ip_arria10_e1sg_jesd204b_ to Q18.0

libraries/technology/ip_arria10_e1sg/jesd204b/hdllib.cfg

.../ip_arria10_e1sg_jesd204b_rx_reset_control_12_clock_in.ip

.../ip_arria10_e1sg_jesd204b_rx_reset_control_12_reset_in.ip

...ria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.ip

...a10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.qsys

..._e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.ip

...1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.qsys

...g/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip

...jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qsys

...10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip

..._e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys

...a_reset_sequencer_180/sim/aldec/altera_reset_controller.v

...a_reset_sequencer_180/sim/aldec/altera_reset_sequencer.sv

..._sequencer_180/sim/aldec/altera_reset_sequencer_av_csr.sv

...equencer_180/sim/aldec/altera_reset_sequencer_deglitch.sv

...cer_180/sim/aldec/altera_reset_sequencer_deglitch_main.sv

...sequencer_180/sim/aldec/altera_reset_sequencer_dlycntr.sv

...et_sequencer_180/sim/aldec/altera_reset_sequencer_main.sv

...set_sequencer_180/sim/aldec/altera_reset_sequencer_seq.sv

...reset_sequencer_180/sim/aldec/altera_reset_synchronizer.v