added eth10g link status MM register

boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_10gbe.vhd

@@ -50,6 +50,9 @@ ENTITY unb2_board_10gbe IS
     reg_mac_mosi        : IN  t_mem_mosi := c_mem_mosi_rst;
     reg_mac_miso        : OUT t_mem_miso;
 
+    reg_eth10g_mosi     : IN  t_mem_mosi := c_mem_mosi_rst;  -- ETH10G (link status register)
+    reg_eth10g_miso     : OUT t_mem_miso;
+
     -- DP interface
     dp_rst              : IN  STD_LOGIC := '0';
     dp_clk              : IN  STD_LOGIC := '0';
@@ -111,6 +114,9 @@ BEGIN
       reg_mac_mosi        => reg_mac_mosi,
       reg_mac_miso        => reg_mac_miso,
 
+      reg_eth10g_mosi     => reg_eth10g_mosi,
+      reg_eth10g_miso     => reg_eth10g_miso,
+
       -- DP interface
       dp_rst              => dp_rst,
       dp_clk              => dp_clk,