From d4f6510ba201a85f0497737e2d82e29943d88b0a Mon Sep 17 00:00:00 2001
From: Leon Hiemstra <hiemstra@astron.nl>
Date: Fri, 26 Jun 2015 09:05:24 +0000
Subject: [PATCH] added eth10g link status MM register
---
.../libraries/unb2_board/src/vhdl/unb2_board_10gbe.vhd | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_10gbe.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_10gbe.vhd
index 37912e19f6..b0108aa9f1 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_10gbe.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_10gbe.vhd
@@ -50,6 +50,9 @@ ENTITY unb2_board_10gbe IS
reg_mac_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_mac_miso : OUT t_mem_miso;
+ reg_eth10g_mosi : IN t_mem_mosi := c_mem_mosi_rst; -- ETH10G (link status register)
+ reg_eth10g_miso : OUT t_mem_miso;
+
-- DP interface
dp_rst : IN STD_LOGIC := '0';
dp_clk : IN STD_LOGIC := '0';
@@ -111,6 +114,9 @@ BEGIN
reg_mac_mosi => reg_mac_mosi,
reg_mac_miso => reg_mac_miso,
+ reg_eth10g_mosi => reg_eth10g_mosi,
+ reg_eth10g_miso => reg_eth10g_miso,
+
-- DP interface
dp_rst => dp_rst,
dp_clk => dp_clk,
--
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