Added tb_tb_diag_block_gen.vhd and added it to the regression test.

libraries/base/diag/hdllib.cfg

@@ -40,6 +40,7 @@ test_bench_files =
     tb/vhdl/tb_mms_diag_seq.vhd
     tb/vhdl/tb_tb_mms_diag_seq.vhd
     tb/vhdl/tb_diag_block_gen.vhd
+    tb/vhdl/tb_tb_diag_block_gen.vhd  
     tb/vhdl/tb_mms_diag_block_gen.vhd
     tb/vhdl/tb_tb_mms_diag_block_gen.vhd
     tb/vhdl/tb_diag_regression.vhd
@@ -47,9 +48,9 @@ test_bench_files =
 regression_test_vhdl = 
     tb/vhdl/tb_diag_wg.vhd
     tb/vhdl/tb_diag_wg_wideband.vhd
-    tb/vhdl/tb_diag_block_gen.vhd  
     tb/vhdl/tb_diag_frm_generator.vhd
     tb/vhdl/tb_diag_frm_monitor.vhd
+    tb/vhdl/tb_tb_diag_block_gen.vhd  
     tb/vhdl/tb_tb_diag_rx_seq.vhd
     tb/vhdl/tb_tb_mms_diag_seq.vhd
     tb/vhdl/tb_tb_mms_diag_block_gen.vhd