From ceda3bd9c9c1ff706cbe4eed86bca53458590e22 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Fri, 20 Apr 2018 11:28:57 +0000
Subject: [PATCH] Added tb_tb_diag_block_gen.vhd and added it to the regression
 test.

---
 libraries/base/diag/hdllib.cfg | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/libraries/base/diag/hdllib.cfg b/libraries/base/diag/hdllib.cfg
index faf33e70ef..8b5452b5c4 100644
--- a/libraries/base/diag/hdllib.cfg
+++ b/libraries/base/diag/hdllib.cfg
@@ -40,6 +40,7 @@ test_bench_files =
     tb/vhdl/tb_mms_diag_seq.vhd
     tb/vhdl/tb_tb_mms_diag_seq.vhd
     tb/vhdl/tb_diag_block_gen.vhd
+    tb/vhdl/tb_tb_diag_block_gen.vhd  
     tb/vhdl/tb_mms_diag_block_gen.vhd
     tb/vhdl/tb_tb_mms_diag_block_gen.vhd
     tb/vhdl/tb_diag_regression.vhd
@@ -47,9 +48,9 @@ test_bench_files =
 regression_test_vhdl = 
     tb/vhdl/tb_diag_wg.vhd
     tb/vhdl/tb_diag_wg_wideband.vhd
-    tb/vhdl/tb_diag_block_gen.vhd  
     tb/vhdl/tb_diag_frm_generator.vhd
     tb/vhdl/tb_diag_frm_monitor.vhd
+    tb/vhdl/tb_tb_diag_block_gen.vhd  
     tb/vhdl/tb_tb_diag_rx_seq.vhd
     tb/vhdl/tb_tb_mms_diag_seq.vhd
     tb/vhdl/tb_tb_mms_diag_block_gen.vhd
-- 
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