-Added arts_unb1_sc1_bg_1GbE to regression test;

-Fixed bug in checking stage of eth_statistics.

applications/arts/designs/arts_unb1_sc1_bg_1GbE/hdllib.cfg

@@ -11,6 +11,8 @@ synth_files =
 test_bench_files =
     tb/vhdl/tb_arts_unb1_sc1_bg_1GbE.vhd
 
+regression_test_vhdl = 
+    tb/vhdl/tb_arts_unb1_sc1_bg_1GbE.vhd
 
 [modelsim_project_file]
 modelsim_copy_files = 
@@ -35,3 +37,5 @@ quartus_qip_files =
     
 quartus_tcl_files =
     $RADIOHDL/applications/arts/designs/arts_unb1_sc1_bg_1GbE/quartus/pinning/arts_unb1_sc1_bg_1GbE_pins.tcl
+
+

libraries/io/eth/src/vhdl/eth_statistics.vhd

@@ -149,7 +149,7 @@ BEGIN
   ------------------------------------------------------------------------------
   -- On tb_end; do the checks defined in the generics
   ------------------------------------------------------------------------------
-  p_tb_end_check: PROCESS(nxt_tb_end, timeout)
+  p_tb_end_check: PROCESS(eth_clk)
   BEGIN
     IF timeout='1' AND nxt_tb_end='0' THEN
       REPORT "[eth_statistics] Timeout occured!" SEVERITY FAILURE;