Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
H
HDL
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Iterations
Wiki
Requirements
Jira
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Container Registry
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
RTSD
HDL
Commits
be928404
Commit
be928404
authored
10 years ago
by
Eric Kooistra
Browse files
Options
Downloads
Patches
Plain Diff
Explained purpose of diag_mod <> 0.
parent
f8c004de
No related branches found
Branches containing commit
No related tags found
Tags containing commit
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
+7
-0
7 additions, 0 deletions
libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
with
7 additions
and
0 deletions
libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd
+
7
−
0
View file @
be928404
...
@@ -133,6 +133,13 @@
...
@@ -133,6 +133,13 @@
-- diag_step = 2**g_seq_dat_w - diag_mod + g_cnt_incr to verify ok as
-- diag_step = 2**g_seq_dat_w - diag_mod + g_cnt_incr to verify ok as
-- simulated with tb_tb_diag_rx_seq. In this mms_diag_tx_seq g_cnt_incr=1
-- simulated with tb_tb_diag_rx_seq. In this mms_diag_tx_seq g_cnt_incr=1
-- fixed for diag_tx_seq.
-- fixed for diag_tx_seq.
-- The default diag_mod=0 is equivalent to diag_mod=2**g_seq_dat_w.
-- Using diag_mod < 2**g_seq_dat_w can be useful to generate tx seq CNTR
-- data that is written to a memory that is larger than 2**g_seq_dat_w
-- addresses. The CNTR values then differ from the memory address values,
-- which can be useful to ensure that reading e.g. address 2**g_seq_dat_w
-- yields a different CNTR value than reading 2**(g_seq_dat_w+1).
LIBRARY
IEEE
,
common_lib
,
dp_lib
;
-- init value for out_dat when diag_en = '0'
LIBRARY
IEEE
,
common_lib
,
dp_lib
;
-- init value for out_dat when diag_en = '0'
USE
IEEE
.
std_logic_1164
.
ALL
;
USE
IEEE
.
std_logic_1164
.
ALL
;
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment