From be928404a67de5c3ef6513034faf990458e25649 Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Fri, 3 Apr 2015 13:48:43 +0000 Subject: [PATCH] Explained purpose of diag_mod <> 0. --- libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd b/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd index ac548d61f7..b00d72c3c0 100644 --- a/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd +++ b/libraries/base/diag/src/vhdl/mms_diag_tx_seq.vhd @@ -133,6 +133,13 @@ -- diag_step = 2**g_seq_dat_w - diag_mod + g_cnt_incr to verify ok as -- simulated with tb_tb_diag_rx_seq. In this mms_diag_tx_seq g_cnt_incr=1 -- fixed for diag_tx_seq. +-- The default diag_mod=0 is equivalent to diag_mod=2**g_seq_dat_w. +-- Using diag_mod < 2**g_seq_dat_w can be useful to generate tx seq CNTR +-- data that is written to a memory that is larger than 2**g_seq_dat_w +-- addresses. The CNTR values then differ from the memory address values, +-- which can be useful to ensure that reading e.g. address 2**g_seq_dat_w +-- yields a different CNTR value than reading 2**(g_seq_dat_w+1). + LIBRARY IEEE, common_lib, dp_lib; -- init value for out_dat when diag_en = '0' USE IEEE.std_logic_1164.ALL; -- GitLab