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Commit ba33f18f authored by Reinier van der Walle's avatar Reinier van der Walle
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Moved ta2 IPs from qsys to top.vhd

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applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/flat.qsf
+ 1
− 4
View file @ ba33f18f
......@@ -492,7 +492,4 @@ set_location_assignment PIN_U12 -to JESD204B_SYNC[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC[0]
set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_40GbE.ip
set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_10GbE.ip
set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_1GbE_mc.ip
set_global_assignment -name IP_FILE ip/board/board_ta2_unb2b_jesd204b.ip
set_global_assignment -name IP_FILE ip/board/board_reg_ta2_unb2b_jesd204b.ip
applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/board/board_cpu_0.ip
+ 2
− 2
View file @ ba33f18f
......@@ -2218,7 +2218,7 @@
<spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /><slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /><slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /><slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /><slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /><slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /><slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='kernel_clk_gen.ctrl' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x8000' end='0x9000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x9000' end='0xA000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
<spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /><slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /><slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /><slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /><slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /><slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /><slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /><slave name='reg_ta2_unb2b_jesd204b.mem' start='0x400' end='0x800' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' datawidth='32' /><slave name='kernel_clk_gen.ctrl' start='0x9000' end='0xA000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
......@@ -3489,7 +3489,7 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='kernel_clk_gen.ctrl' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x8000' end='0x9000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x9000' end='0xA000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
<value>&lt;address-map&gt;&lt;slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /&gt;&lt;slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /&gt;&lt;slave name='reg_unb_pmbus.mem' start='0x100' end='0x200' datawidth='32' /&gt;&lt;slave name='reg_unb_sens.mem' start='0x200' end='0x300' datawidth='32' /&gt;&lt;slave name='timer_0.s1' start='0x300' end='0x320' datawidth='16' /&gt;&lt;slave name='reg_fpga_temp_sens.mem' start='0x320' end='0x340' datawidth='32' /&gt;&lt;slave name='reg_epcs.mem' start='0x340' end='0x360' datawidth='32' /&gt;&lt;slave name='reg_remu.mem' start='0x360' end='0x380' datawidth='32' /&gt;&lt;slave name='pio_wdi.s1' start='0x380' end='0x390' datawidth='32' /&gt;&lt;slave name='reg_mmdp_data.mem' start='0x390' end='0x398' datawidth='32' /&gt;&lt;slave name='reg_mmdp_ctrl.mem' start='0x398' end='0x3A0' datawidth='32' /&gt;&lt;slave name='reg_dpmm_data.mem' start='0x3A0' end='0x3A8' datawidth='32' /&gt;&lt;slave name='reg_dpmm_ctrl.mem' start='0x3A8' end='0x3B0' datawidth='32' /&gt;&lt;slave name='pio_pps.mem' start='0x3B0' end='0x3B8' datawidth='32' /&gt;&lt;slave name='jtag_uart_0.avalon_jtag_slave' start='0x3B8' end='0x3C0' datawidth='32' /&gt;&lt;slave name='reg_ta2_unb2b_jesd204b.mem' start='0x400' end='0x800' datawidth='32' /&gt;&lt;slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /&gt;&lt;slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /&gt;&lt;slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /&gt;&lt;slave name='kernel_interface.ctrl' start='0x4000' end='0x8000' datawidth='32' /&gt;&lt;slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' datawidth='32' /&gt;&lt;slave name='kernel_clk_gen.ctrl' start='0x9000' end='0xA000' datawidth='32' /&gt;&lt;slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
......
applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd
+ 4
− 38
View file @ ba33f18f
......@@ -56,22 +56,11 @@ ENTITY ta2_unb2b_1GbE_mc IS
st_rst : IN STD_LOGIC;
-- eth1g UDP streaming ports
udp_tx_sosi_data : OUT STD_LOGIC_VECTOR(5*c_byte_w -1 DOWNTO 0);
udp_tx_sosi_valid : OUT STD_LOGIC;
udp_tx_sosi_sop : OUT STD_LOGIC;
udp_tx_sosi_eop : OUT STD_LOGIC;
udp_tx_sosi_empty : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
udp_tx_siso_ready : IN STD_LOGIC;
udp_tx_siso_xon : IN STD_LOGIC;
udp_tx_sosi : OUT t_dp_sosi;
udp_tx_siso : IN t_dp_siso;
udp_rx_sosi : IN t_dp_sosi;
udp_rx_siso : OUT t_dp_siso;
udp_rx_sosi_data : IN STD_LOGIC_VECTOR(5*c_byte_w -1 DOWNTO 0);
udp_rx_sosi_valid : IN STD_LOGIC;
udp_rx_sosi_sop : IN STD_LOGIC;
udp_rx_sosi_eop : IN STD_LOGIC;
udp_rx_sosi_empty : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
udp_rx_siso_ready : OUT STD_LOGIC;
udp_rx_siso_xon : OUT STD_LOGIC;
kernel_clk : IN STD_LOGIC; -- Kernel clock (runs the kernel_* I/O below)
kernel_reset : IN STD_LOGIC;
......@@ -109,31 +98,8 @@ ARCHITECTURE str OF ta2_unb2b_1GbE_mc IS
SIGNAL dp_xonoff_src_out : t_dp_sosi;
SIGNAL dp_xonoff_src_in : t_dp_siso;
SIGNAL udp_tx_sosi : t_dp_sosi;
SIGNAL udp_tx_siso : t_dp_siso;
SIGNAL udp_rx_sosi : t_dp_sosi;
SIGNAL udp_rx_siso : t_dp_siso;
BEGIN
udp_tx_sosi_data <= udp_tx_sosi.data(39 DOWNTO 0);
udp_tx_sosi_valid <= udp_tx_sosi.valid;
udp_tx_sosi_sop <= udp_tx_sosi.sop;
udp_tx_sosi_eop <= udp_tx_sosi.eop;
udp_tx_sosi_empty <= udp_tx_sosi.empty(1 DOWNTO 0);
udp_tx_siso.ready <= udp_tx_siso_ready;
udp_tx_siso.xon <= udp_tx_siso_xon;
udp_rx_sosi.data(39 DOWNTO 0) <= udp_rx_sosi_data;
udp_rx_sosi.valid <= udp_rx_sosi_valid;
udp_rx_sosi.sop <= udp_rx_sosi_sop;
udp_rx_sosi.eop <= udp_rx_sosi_eop;
udp_rx_sosi.empty(1 DOWNTO 0) <= udp_rx_sosi_empty;
udp_rx_siso_ready <= udp_rx_siso.ready;
udp_rx_siso_xon <= udp_rx_siso.xon;
-------------------------------------------------------
-- Mapping Data from OpenCL kernel to 1GbE Interface --
-------------------------------------------------------
......
applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
+ 2
− 16
View file @ ba33f18f
......@@ -55,12 +55,8 @@ ENTITY ta2_unb2b_jesd204b IS
config_reset : IN STD_LOGIC;
-- MM Control
jesd204b_mosi_address : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
jesd204b_mosi_wrdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
jesd204b_mosi_wr : IN STD_LOGIC;
jesd204b_mosi_rd : IN STD_LOGIC;
jesd204b_miso_rddata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
jesd204b_miso_waitrequest : OUT STD_LOGIC;
jesd204b_mosi : IN t_mem_mosi;
jesd204b_miso : OUT t_mem_miso;
-- JESD204B external signals
jesd204b_refclk : IN STD_LOGIC := '0'; -- Reference clock. For AD9683 use 200MHz direct from clock reference pin
......@@ -101,20 +97,10 @@ ARCHITECTURE str OF ta2_unb2b_jesd204b IS
SIGNAL jesd204b_frame_clk : STD_LOGIC;
SIGNAL jesd204b_rx_src_out_flat_w_sync : t_dp_sosi;
SIGNAL jesd204b_mosi : t_mem_mosi;
SIGNAL jesd204b_miso : t_mem_miso;
SIGNAL i_jesd204b_sync_n_arr : STD_LOGIC_VECTOR(c_nof_streams_jesd204b-1 DOWNTO 0);
SIGNAL jesd204b_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_streams_jesd204b-1 DOWNTO 0) := (OTHERS => '0');
BEGIN
jesd204b_mosi.address(7 DOWNTO 0) <= jesd204b_mosi_address;
jesd204b_mosi.wrdata(31 DOWNTO 0) <= jesd204b_mosi_wrdata;
jesd204b_mosi.wr <= jesd204b_mosi_wr;
jesd204b_mosi.rd <= jesd204b_mosi_rd;
jesd204b_miso_rddata <= jesd204b_miso.rddata(31 DOWNTO 0);
jesd204b_miso_waitrequest <= jesd204b_miso.waitrequest;
jesd204b_sync_n_arr <= i_jesd204b_sync_n_arr(c_nof_connected_streams_jesd204b -1 DOWNTO 0);
jesd204b_serial_rx_arr(c_nof_connected_streams_jesd204b -1 DOWNTO 0) <= serial_rx_arr;
......
applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/opencl_bsp_ip.qsf
+ 8
− 1
View file @ ba33f18f
......@@ -24,6 +24,7 @@ source device.tcl
#============================================================
set_global_assignment -name TOP_LEVEL_ENTITY top
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VHDL_FILE top_components_pkg.vhd
set_global_assignment -name VHDL_FILE top.vhd
set_global_assignment -name VERILOG_FILE ip/freeze_wrapper.v
set_global_assignment -name VERILOG_FILE ip/pr_region.v
......@@ -37,6 +38,12 @@ set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1932
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 4
set_global_assignment -name QSYS_FILE board.qsys
set_global_assignment -name VHDL_FILE ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.vhd
set_global_assignment -name VHDL_FILE ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.vhd
set_global_assignment -name VHDL_FILE ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd
set_global_assignment -name VHDL_FILE ip/ta2_unb2b_jesd204b/ta2_unb2b_jesd204b.vhd
set_global_assignment -name IP_FILE ip/board/board_reg_unb_pmbus.ip
set_global_assignment -name IP_FILE ip/board/board_kernel_clk_gen.ip
set_global_assignment -name IP_FILE ip/board/board_reg_epcs.ip
......@@ -62,4 +69,4 @@ set_global_assignment -name IP_FILE ip/board/board_reg_remu.ip
set_global_assignment -name IP_FILE ip/board/board_jtag_uart_0.ip
set_global_assignment -name IP_FILE ip/board/board_kernel_clk.ip
set_global_assignment -name IP_FILE ip/board/board_onchip_memory.ip
set_global_assignment -name IP_FILE ip/board/board_reg_ta2_unb2b_jesd204b.ip
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