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Commit b3199dfd authored by Pieter Donker's avatar Pieter Donker
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more changes in cfg and tcl files

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with 10 additions and 35 deletions
boards/uniboard1/designs/unb1_bn_capture/hdllib.cfg
+ 0
− 2
View file @ b3199dfd
......@@ -26,7 +26,6 @@ regression_test_vhdl =
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/i2c/tb/data data
$RADIOHDL_WORK/libraries/base/diag/src/data data
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
......@@ -35,7 +34,6 @@ quartus_copy_files =
quartus/sopc_unb1_bn_capture.sopc .
$RADIOHDL_WORK/libraries/io/i2c/tb/data data
$RADIOHDL_WORK/libraries/base/diag/src/data data
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_bn_terminal_bg/hdllib.cfg
+ 0
− 3
View file @ b3199dfd
......@@ -17,8 +17,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/base/diag/src/data data
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
......@@ -26,7 +24,6 @@ synth_top_level_entity =
quartus_copy_files =
quartus/sopc_unb1_bn_terminal_bg.sopc .
$RADIOHDL_WORK/libraries/base/diag/src/data data
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_ddr3/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -14,7 +14,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb1
# in Modelsim do:
......
boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
+ 0
− 3
View file @ b3199dfd
......@@ -17,18 +17,15 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
modelsim_compile_ip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
quartus/sopc_unb1_ddr3.sopc .
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_ddr3_reorder/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -14,7 +14,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb1
# in Modelsim do:
......
boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
+ 0
− 2
View file @ b3199dfd
......@@ -17,7 +17,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
modelsim_compile_ip_files =
$RADIOHDL_WORK/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
......@@ -28,7 +27,6 @@ synth_top_level_entity =
quartus_copy_files =
quartus/sopc_unb_ddr3_transpose.sopc .
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
+ 0
− 3
View file @ b3199dfd
......@@ -16,15 +16,12 @@ test_bench_files =
[modelsim_project_file]
#modelsim_copy_files = src/hex hex
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
quartus/sopc_unb1_fn_terminal_db.sopc .
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_heater/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -16,7 +16,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb1
# in Modelsim do:
......
boards/uniboard1/designs/unb1_heater/hdllib.cfg
+ 0
− 3
View file @ b3199dfd
......@@ -15,8 +15,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
......@@ -24,7 +22,6 @@ synth_top_level_entity =
quartus_copy_files =
quartus/qsys_unb1_heater.qsys .
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_minimal/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -18,7 +18,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb1
# in Modelsim do:
......
boards/uniboard1/designs/unb1_minimal/hdllib.cfg
+ 0
− 2
View file @ b3199dfd
......@@ -15,8 +15,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
quartus_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
boards/uniboard1/designs/unb1_terminal_bg_mesh_db/hdllib.cfg
+ 0
− 3
View file @ b3199dfd
......@@ -17,8 +17,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
src/hex hex
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
......@@ -27,7 +25,6 @@ synth_top_level_entity =
quartus_copy_files =
quartus/qsys_unb1_terminal_bg_mesh_db.qsys .
src/hex hex
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
boards/uniboard1/designs/unb1_test/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -46,7 +46,7 @@ The following revisions are available for unb1_test (see the directories in ../r
Simulation
----------
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb1
Further Modelsim instructions: see the README file in the ../revisions/* directories
......
boards/uniboard1/designs/unb1_test/hdllib.cfg
+ 0
− 2
View file @ b3199dfd
......@@ -17,10 +17,8 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
[quartus_project_file]
quartus_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
+ 0
− 2
View file @ b3199dfd
......@@ -15,7 +15,6 @@ test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
# src/hex hex
......@@ -25,7 +24,6 @@ modelsim_copy_files =
synth_top_level_entity =
quartus_copy_files =
$RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw_unb1.tcl $RADIOHDL_WORK/libraries/io/eth/src/vhdl/avs2_eth_coe_hw.tcl
quartus/qsys_unb1_tr_10GbE.qsys .
# src/hex/ hex
......
boards/uniboard2/designs/unb2_minimal/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -26,7 +26,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb2
# in Modelsim do:
......
boards/uniboard2/designs/unb2_test/doc/README
+ 1
− 1
View file @ b3199dfd
......@@ -54,7 +54,7 @@ The following revisions are available for unb2_test (see the directories in ../r
Simulation
----------
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb2
Further Modelsim instructions: see the README file in the ../revisions/* directories
......
boards/uniboard2a/designs/unb2a_heater/doc/README.txt
+ 1
− 1
View file @ b3199dfd
......@@ -26,7 +26,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb2a
# in Modelsim do:
......
boards/uniboard2a/designs/unb2a_minimal/doc/README.txt
+ 1
− 1
View file @ b3199dfd
......@@ -28,7 +28,7 @@ Simulation
----------
Modelsim instructions:
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb2a
# in Modelsim do:
......
boards/uniboard2a/designs/unb2a_test/doc/README.txt
+ 1
− 1
View file @ b3199dfd
......@@ -53,7 +53,7 @@ The following revisions are available for unb2a_test (see the directories in ../
Simulation
----------
# in bash do:
rm $UNB/Software/python/sim/* # (optional)
rm $SIM_DIR/* # (optional)
run_modelsim unb2a
Further Modelsim instructions: see the README file in the ../revisions/* directories
......
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