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Commit b232c8c7 authored by Eric Kooistra's avatar Eric Kooistra
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Added [section headers].

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with 223 additions and 156 deletions
......@@ -2,18 +2,8 @@ hdl_lib_name = aartfaac_bn_sdo
hdl_library_clause_name = aartfaac_bn_sdo_lib
hdl_lib_uses_synth = unb1_board rsp_terminal ss
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
src/quartus/sopc_aartfaac_bn_sdo.sopc .
src/hex/ hex
modelsim_copy_files =
src/hex/ hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/aartfaac_bn_sdo/sopc_aartfaac_bn_sdo.vhd
src/vhdl/mmm_aartfaac_bn_sdo.vhd
......@@ -23,6 +13,19 @@ synth_files =
test_bench_files =
tb/vhdl/tb_aartfaac_bn_sdo.vhd
[modelsim_project_file]
modelsim_copy_files =
src/hex/ hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
src/quartus/sopc_aartfaac_bn_sdo.sopc .
src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,16 +2,8 @@ hdl_lib_name = aartfaac_fn_sdo
hdl_library_clause_name = aartfaac_fn_sdo_lib
hdl_lib_uses_synth = unb1_board tr_xaui tr_10GbE tr_nonbonded
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
src/quartus/sopc_aartfaac_fn_sdo.sopc .
modelsim_copy_files =
synth_files =
$HDL_BUILD_DIR/unb1/quartus/aartfaac_fn_sdo/sopc_aartfaac_fn_sdo.vhd
src/vhdl/mmm_aartfaac_fn_sdo.vhd
......@@ -19,6 +11,17 @@ synth_files =
test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
src/quartus/sopc_aartfaac_fn_sdo.sopc .
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,7 +2,6 @@ hdl_lib_name = rsp_serdes
hdl_library_clause_name = rsp_serdes_lib
hdl_lib_uses_synth =
hdl_lib_uses_sim = common dp
hdl_lib_technology =
synth_files =
......@@ -11,3 +10,9 @@ synth_files =
test_bench_files =
$SVN/Aartfaac/trunk/Firmware/modules/rsp_serdes/tb/vhdl/tb_rsp_serdes.vhd
[modelsim_project_file]
[quartus_project_file]
......@@ -18,5 +18,11 @@ test_bench_files =
$SVN/Aartfaac/trunk/Firmware/modules/rsp_terminal/tb/vhdl/tb_rsp_terminal.vhd
$SVN/Aartfaac/trunk/Firmware/modules/rsp_terminal/tb/vhdl/tb_tb_rsp_terminal.vhd
[modelsim_project_file]
modelsim_copy_files =
$SVN/Aartfaac/trunk/Firmware/modules/rsp_terminal/src/hex/ hex
[quartus_project_file]
......@@ -5,17 +5,19 @@ hdl_lib_uses_sim = aartfaac_bn_sdo aartfaac_fn_sdo
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
modelsim_copy_files =
synth_files =
test_bench_files =
tb/vhdl/tb_aartfaac_sdo.vhd
[modelsim_project_file]
modelsim_copy_files =
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
quartus_qsf_files =
quartus_tcl_files =
quartus_vhdl_files =
......
......@@ -3,8 +3,6 @@ hdl_library_clause_name = apertif_unb1_bn_filterbank_lib
hdl_lib_uses_synth = common technology tech_mac_10g tr_10GbE mm i2c unb1_board bf wpfb aduh reorder
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
synth_files =
$RADIOHDL/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_pkg.vhd
$RADIOHDL/boards/uniboard1/designs/unb1_bn_capture/src/vhdl/unb1_bn_capture_input.vhd
......@@ -18,10 +16,16 @@ synth_files =
test_bench_files =
tb/vhdl/tb_apertif_unb1_bn_filterbank.vhd
[modelsim_project_file]
modelsim_copy_files = src/hex hex
$RADIOHDL/libraries/io/i2c/tb/data data
$RADIOHDL/libraries/base/diag/src/data data
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files = quartus/sopc_apertif_unb1_bn_filterbank.sopc .
src/hex hex
$RADIOHDL/libraries/io/i2c/tb/data data
......
......@@ -3,8 +3,6 @@ hdl_library_clause_name = apertif_unb1_cor_mesh_ref_lib
hdl_lib_uses_synth = common technology mm i2c unb1_board diag eth tech_tse reorder apertif
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_cor_mesh_ref/qsys_apertif_unb1_cor_mesh_ref/synthesis/qsys_apertif_unb1_cor_mesh_ref.v
src/vhdl/mmm_apertif_unb1_cor_mesh_ref.vhd
......@@ -14,8 +12,14 @@ synth_files =
test_bench_files =
tb/vhdl/tb_apertif_unb1_cor_mesh_ref.vhd
[modelsim_project_file]
modelsim_copy_files = src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files = quartus/qsys_apertif_unb1_cor_mesh_ref.qsys .
src/hex hex
quartus_qsf_files =
......
......@@ -2,19 +2,8 @@ hdl_lib_name = apertif_unb1_correlator
hdl_library_clause_name = apertif_unb1_correlator_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
quartus/qsys_apertif_unb1_correlator.qsys .
quartus/sopc_apertif_unb1_correlator.sopc .
src/hex/ hex
modelsim_copy_files =
src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator/sopc_apertif_unb1_correlator.vhd
......@@ -25,6 +14,20 @@ synth_files =
test_bench_files =
tb/vhdl/tb_apertif_unb1_correlator.vhd
[modelsim_project_file]
modelsim_copy_files =
src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
quartus/qsys_apertif_unb1_correlator.qsys .
quartus/sopc_apertif_unb1_correlator.sopc .
src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_filter
hdl_library_clause_name = apertif_unb1_correlator_filter_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_filter/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -30,6 +20,19 @@ synth_files =
test_bench_files =
tb_apertif_unb1_correlator_filter.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_full
hdl_library_clause_name = apertif_unb1_correlator_full_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_full/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -30,6 +20,19 @@ synth_files =
test_bench_files =
tb_apertif_unb1_correlator_full.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,19 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_lite
hdl_library_clause_name = apertif_unb1_correlator_lite_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim = apertif_unb1_fn_bf_emu
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
../../../apertif_unb1_fn_bf_emu/src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_lite/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -32,6 +21,20 @@ synth_files =
test_bench_files =
tb_apertif_unb1_correlator_lite.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
../../../apertif_unb1_fn_bf_emu/src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_lite_bg
hdl_library_clause_name = apertif_unb1_correlator_lite_bg_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_lite_bg/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -32,6 +22,19 @@ test_bench_files =
tb_apertif_unb1_correlator_lite_bg.vhd
../../tb/vhdl/tb_apertif_unb1_correlator_output_framer.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_lite_bg_8
hdl_library_clause_name = apertif_unb1_correlator_lite_bg_8_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_lite_bg_8/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -32,6 +22,19 @@ test_bench_files =
tb_apertif_unb1_correlator_lite_bg_8.vhd
../../tb/vhdl/tb_apertif_unb1_correlator_output_framer.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_mesh_distr_ref
hdl_library_clause_name = apertif_unb1_correlator_mesh_distr_ref_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_mesh_distr_ref/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -30,6 +20,19 @@ synth_files =
test_bench_files =
tb_apertif_unb1_correlator_mesh_distr_ref.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_mesh_ref
hdl_library_clause_name = apertif_unb1_correlator_mesh_ref_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_mesh_ref/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -31,6 +21,19 @@ synth_files =
test_bench_files =
tb_apertif_unb1_correlator_mesh_ref.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,19 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_rx_only
hdl_library_clause_name = apertif_unb1_correlator_rx_only_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim = apertif_unb1_fn_bf_emu
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
../../../apertif_unb1_fn_bf_emu/src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_rx_only/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -31,6 +20,20 @@ synth_files =
test_bench_files =
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
../../../apertif_unb1_fn_bf_emu/src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,18 +2,8 @@ hdl_lib_name = apertif_unb1_correlator_simple
hdl_library_clause_name = apertif_unb1_correlator_simple_lib
hdl_lib_uses_synth = common mm dp i2c unb1_board tr_10GbE correlator diag rTwoSDF wpfb st filter fft apertif bf
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
modelsim_copy_files =
../../src/hex hex
synth_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_correlator_simple/qsys_apertif_unb1_correlator/synthesis/qsys_apertif_unb1_correlator.v
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
......@@ -30,6 +20,19 @@ synth_files =
test_bench_files =
tb_apertif_unb1_correlator_simple.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
../../quartus/qsys_apertif_unb1_correlator.qsys .
../../src/hex/ hex
quartus_qsf_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
......
......@@ -2,22 +2,13 @@ hdl_lib_name = sim_apertif_unb1_correlator_nodes
hdl_library_clause_name = sim_apertif_unb1_correlator_nodes_lib
hdl_lib_uses_synth = common mm dp correlator diag rTwoSDF wpfb st filter fft apertif bf unb1_board tr_10GbE
hdl_lib_uses_sim =
hdl_lib_technology = ip_stratixiv
synth_top_level_entity =
quartus_copy_files =
modelsim_copy_files =
../../src/hex hex
synth_files =
../../src/vhdl/apertif_unb1_correlator_pkg.vhd
../../src/vhdl/apertif_unb1_correlator_output_framer.vhd
../../src/vhdl/apertif_unb1_correlator_vis_offload.vhd
../../src/vhdl/node_apertif_unb1_correlator_input_sync_insert.vhd
../../src/vhdl/node_apertif_unb1_correlator_input.vhd
../../src/vhdl/node_apertif_unb1_correlator_mesh.vhd
../../src/vhdl/node_apertif_unb1_correlator_processing.vhd
......@@ -26,6 +17,17 @@ synth_files =
test_bench_files =
tb_node_apertif_unb1_correlator_input.vhd
[modelsim_project_file]
modelsim_copy_files =
../../src/hex hex
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files =
quartus_qsf_files =
quartus_tcl_files =
......
......@@ -7,8 +7,6 @@ hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master
ip_stratixiv_ddr3_uphy_4g_single_rank_800_master
ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
synth_top_level_entity =
synth_files =
../../../../../../libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_fn_beamformer_base/sopc_apertif_unb1_fn_beamformer.vhd
......@@ -22,8 +20,18 @@ synth_files =
test_bench_files =
tb_apertif_unb1_fn_beamformer_base.vhd
[modelsim_project_file]
modelsim_copy_files = ../../src/hex hex
modelsim_search_libraries =
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip
[quartus_project_file]
synth_top_level_entity =
quartus_copy_files = ../../quartus/sopc_apertif_unb1_fn_beamformer.sopc .
quartus_qsf_files =
......@@ -36,9 +44,5 @@ quartus_tcl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_fn_beamformer_base/sopc_apertif_unb1_fn_beamformer.qip
modelsim_search_libraries =
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip
quartus_sdc_files =
$RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.sdc
......@@ -6,8 +6,6 @@ hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_master
ip_stratixiv_ddr3_uphy_4g_800_slave
ip_stratixiv_ddr3_uphy_4g_single_rank_800_slave
synth_top_level_entity = apertif_unb1_fn_beamformer_bg_bf_tp
synth_files =
../../../../../../libraries/dsp/bf/designs/unb1_fn_bf/src/vhdl/node_unb1_fn_bf.vhd
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_fn_beamformer_bg_bf_tp/sopc_apertif_unb1_fn_beamformer.vhd
......@@ -21,8 +19,21 @@ synth_files =
test_bench_files =
tb_apertif_unb1_fn_beamformer_bg_bf_tp.vhd
[modelsim_project_file]
modelsim_copy_files = ../../src/hex hex
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/copy_hex_files.tcl
modelsim_search_libraries =
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip
[quartus_project_file]
synth_top_level_entity = apertif_unb1_fn_beamformer_bg_bf_tp
quartus_copy_files = ../../quartus/sopc_apertif_unb1_fn_beamformer.sopc .
../../src/hex hex
......@@ -37,10 +48,3 @@ quartus_tcl_files =
quartus_qip_files =
$HDL_BUILD_DIR/unb1/quartus/apertif_unb1_fn_beamformer_bg_bf_tp/sopc_apertif_unb1_fn_beamformer.qip
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_single_rank_800_master/copy_hex_files.tcl
modelsim_search_libraries =
altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip
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