add _e3sge3 option (for unb2a) to technology wrapper

libraries/technology/fpga_temp_sens/tech_fpga_temp_sens.vhd

@@ -45,6 +45,7 @@ END tech_fpga_temp_sens;
 ARCHITECTURE str OF tech_fpga_temp_sens IS
 
 BEGIN
+
   gen_ip_arria10 : IF g_technology=c_tech_arria10 GENERATE
 	  u0 : ip_arria10_temp_sense
 		PORT MAP (
@@ -55,4 +56,14 @@ BEGIN
 		);
   END GENERATE;
 
+  gen_ip_arria10_e3sge3 : IF g_technology=c_tech_arria10_e3sge3 GENERATE
+	  u0 : ip_arria10_e3sge3_temp_sense
+		PORT MAP (
+			corectl => corectl, -- corectl.corectl
+			reset   => reset,   --   reset.reset
+			tempout => tempout, -- tempout.tempout
+			eoc     => eoc      --     eoc.eoc
+		);
+  END GENERATE;
+
 END ARCHITECTURE;

libraries/technology/fpga_voltage_sens/tech_fpga_voltage_sens.vhd

@@ -53,6 +53,7 @@ END tech_fpga_voltage_sens;
 ARCHITECTURE str OF tech_fpga_voltage_sens IS
 
 BEGIN
+
   gen_ip_arria10 : IF g_technology=c_tech_arria10 GENERATE
     u0 : ip_arria10_voltage_sense
       PORT MAP (
@@ -72,4 +73,23 @@ BEGIN
       );
   END GENERATE;
 
+  gen_ip_arria10_e3sge3 : IF g_technology=c_tech_arria10_e3sge3 GENERATE
+    u0 : ip_arria10_e3sge3_voltage_sense
+      PORT MAP (
+        clock_clk                  => clock_clk,                  
+        reset_sink_reset           => reset_sink_reset,           
+        controller_csr_address     => controller_csr_address,  
+        controller_csr_read        => controller_csr_read,    
+        controller_csr_write       => controller_csr_write,       
+        controller_csr_writedata   => controller_csr_writedata,   
+        controller_csr_readdata    => controller_csr_readdata,    
+        sample_store_csr_address   => sample_store_csr_address,   
+        sample_store_csr_read      => sample_store_csr_read,      
+        sample_store_csr_write     => sample_store_csr_write,     
+        sample_store_csr_writedata => sample_store_csr_writedata, 
+        sample_store_csr_readdata  => sample_store_csr_readdata,  
+        sample_store_irq_irq       => sample_store_irq_irq        
+      );
+  END GENERATE;
+
 END ARCHITECTURE;