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abfe6c8a

Commit abfe6c8a authored 10 years ago by Kenneth Hiemstra

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ETH_CLK is configurable for XO 25 or 125MHz

parent f2306ccb

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Changes 3

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boards/uniboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd 53 additions, 39 deletions

...iboard2/libraries/unb2_board/src/vhdl/ctrl_unb2_board.vhd
boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd 69 additions, 0 deletions

...2/libraries/unb2_board/src/vhdl/unb2_board_clk125_pll.vhd
boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd 7 additions, 6 deletions

...niboard2/libraries/unb2_board/src/vhdl/unb2_board_pkg.vhd

with 129 additions and 45 deletions

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