SVN copy/renamed the two 200MHz PLLs that are used with UniBoard1 designs:

. clk200_pll.vhd    --> pll/ip_stratixiv_pll_clk200.vhd    => for designs without ADUH
. clk200_pll_p6.vhd --> pll/ip_stratixiv_pll_clk200_p6.vhd => for designs with    ADUH