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Commit 922e8576 authored by Reinier van der Walle's avatar Reinier van der Walle
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removed unused peripherals from yaml and removed mmap gold files.

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applications/lofar2/designs/lofar2_unb2b_ring/lofar2_unb2b_ring.fpga.yaml
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......@@ -5,38 +5,6 @@ schema_type: fpga
hdl_library_name: lofar2_unb2b_ring
fpga_name: lofar2_unb2b_ring
fpga_description: "FPGA design lofar2_unb2b_ring"
parameters:
- { name: c_N_pol_bf, value: 2 } # NOTE: define c_N_pol_bf before c_N_pol, to avoid that c_N_pol_bf gets substituted by 2_bf
- { name: c_N_pol, value: 2 }
- { name: c_N_beamsets, value: 2 }
- { name: c_N_sub, value: 512 }
- { name: c_N_fft, value: 1024 }
- { name: c_N_pn_lb, value: 16 }
- { name: c_S_pn, value: 12 }
- { name: c_Q_fft, value: 2 }
- { name: c_P_sq, value: 1 + c_N_pn_lb // 2 } # = 1 + 16 // 2 = 9, on revision xsub_one only first X_sq cell is used
- { name: c_X_sq, value: c_S_pn * c_S_pn } # = 144
- { name: c_N_crosslets, value: 7 }
- { name: c_N_taps, value: 16 }
- { name: c_W_adc_jesd, value: 16 }
- { name: c_W_adc, value: 14 }
- { name: c_V_sample_delay, value: 4096 }
- { name: c_V_si_db_large, value: 131072 }
- { name: c_V_si_db, value: 1024 }
- { name: c_V_si_histogram, value: 512 }
- { name: c_W_fir_coef, value: 16 }
- { name: c_W_subband, value: 18 }
- { name: c_P_pfb, value: c_S_pn / c_Q_fft } # = 6
- { name: c_A_pn, value: c_S_pn / c_N_pol } # = 6
- { name: c_S_sub_bf, value: 488 }
- { name: c_f_adc_MHz, value: 200 }
- { name: c_W_sub_weight, value: 16 }
- { name: c_W_bf_weight, value: 16 }
- { name: c_W_beamlet_scale, value: 16 }
- { name: c_W_beamlet_resolution, value: 0 - 15 } # EK: FIXME: support passing on negative values, workaround use 0 - positive
- { name: c_W_beamlet, value: 8 }
- { name: c_stat_data_sz, value: 2 }
- { name: c_nof_clk_per_pps, value: c_f_adc_MHz * 10**6 } # = 200000000
peripherals:
#############################################################################
......@@ -89,247 +57,4 @@ peripherals:
mm_port_names:
- REG_REMU
#############################################################################
# SDP Info
#############################################################################
- peripheral_name: sdp/sdp_info
mm_port_names:
- REG_SDP_INFO
#############################################################################
# AIT = ADC Input and Timing (see node_adc_input_and_timing.vhd)
#############################################################################
- peripheral_name: tech_jesd204b/jesd_ctrl
mm_port_names:
- PIO_JESD_CTRL
- peripheral_name: tech_jesd204b/jesd204b_arria10
parameter_overrides:
- { name: g_nof_streams, value: c_S_pn }
mm_port_names:
- JESD204B
- peripheral_name: dp/dp_shiftram
parameter_overrides:
- { name: g_nof_streams, value: c_S_pn }
- { name: g_nof_words, value: c_V_sample_delay }
- { name: g_data_w, value: c_W_adc_jesd }
mm_port_names:
- REG_DP_SHIFTRAM
- peripheral_name: dp/dp_bsn_source_v2
parameter_overrides:
- { name: g_nof_clk_per_sync, value: c_nof_clk_per_pps }
- { name: g_block_size, value: c_N_fft }
- { name: g_bsn_time_offset_w, value: ceil_log2(c_N_fft) }
mm_port_names:
- REG_BSN_SOURCE_V2
- peripheral_name: dp/dp_bsn_scheduler
mm_port_names:
- REG_BSN_SCHEDULER
- peripheral_name: dp/dp_bsn_monitor
peripheral_group: input
mm_port_names:
- REG_BSN_MONITOR_INPUT
- peripheral_name: diag/diag_wg_wideband
parameter_overrides:
- { name: g_nof_streams, value: c_S_pn }
mm_port_names:
- REG_WG
- RAM_WG
- peripheral_name: st/st_histogram
parameter_overrides:
- { name: g_nof_instances, value: c_S_pn }
- { name: g_nof_bins, value: c_V_si_histogram }
- { name: g_nof_data_per_sync, value: c_nof_clk_per_pps}
mm_port_names:
- RAM_ST_HISTOGRAM
- peripheral_name: aduh/aduh_mon_dc_power
parameter_overrides:
- { name: g_nof_streams, value: c_S_pn }
mm_port_names:
- REG_ADUH_MONITOR
# Commented RAM_ADUH_MON, because use RAM_DIAG_DATA_BUF_BSN instead
#- peripheral_name: aduh/aduh_mon_data_buffer
# parameter_overrides:
# - { name: g_nof_streams, value: c_S_pn }
# - { name: g_symbol_w, value: c_W_adc_jesd }
# - { name: g_nof_symbols_per_data, value: 1 }
# - { name: g_buffer_nof_symbols, value: 512 }
# - { name: g_buffer_use_sync, value: True }
# mm_port_names:
# - RAM_ADUH_MON
- peripheral_name: diag/diag_data_buffer
peripheral_group: bsn
parameter_overrides:
- { name: g_nof_streams, value: c_S_pn }
- { name: g_data_w, value: c_W_adc_jesd }
- { name: g_nof_data, value: c_V_si_db }
mm_port_names:
- REG_DIAG_DATA_BUFFER_BSN
- RAM_DIAG_DATA_BUFFER_BSN
#############################################################################
# Fsub = Subband Filterbank (from node_sdp_filterbank.vhd)
#############################################################################
- peripheral_name: si/si
mm_port_names:
- REG_SI
- peripheral_name: filter/fil_ppf_w
parameter_overrides:
- { name: g_fil_ppf.wb_factor, value: 1 } # process at sample rate (so no parallel wideband factor)
- { name: g_fil_ppf.nof_chan, value: 0 } # process at sample rate (so no serial time multiplexing)
- { name: g_fil_ppf.nof_bands, value: c_N_fft }
- { name: g_fil_ppf.nof_taps, value: c_N_taps }
- { name: g_fil_ppf.nof_streams, value: 1 }
- { name: g_fil_ppf.coef_dat_w, value: c_W_fir_coef }
mm_port_names:
- RAM_FIL_COEFS
- peripheral_name: sdp/sdp_subband_equalizer
mm_port_names:
- RAM_EQUALIZER_GAINS
- peripheral_name: dp/dp_selector
mm_port_names:
- REG_DP_SELECTOR # input_select = 0 for weighted subbands, input_select = 1 for raw subbands
- peripheral_name: st/st_sst_for_sdp
mm_port_names:
- RAM_ST_SST
- peripheral_name: common/common_variable_delay
peripheral_group: sst
mm_port_names:
- REG_STAT_ENABLE_SST
- peripheral_name: sdp/sdp_statistics_offload_hdr_dat_sst
peripheral_group: sst
mm_port_names:
- REG_STAT_HDR_DAT_SST
#############################################################################
# Xsub = Subband Correlator (from node_sdp_correlator.vhd)
#############################################################################
- peripheral_name: dp/dp_bsn_sync_scheduler
peripheral_group: xsub
mm_port_names:
- REG_BSN_SYNC_SCHEDULER_XSUB
- peripheral_name: st/st_xst_for_sdp
parameter_overrides:
- { name: g_nof_streams, value: c_P_sq }
- { name: g_nof_crosslets, value: c_N_crosslets }
mm_port_names:
- RAM_ST_XSQ
- peripheral_name: sdp/sdp_crosslets_subband_select
mm_port_names:
- REG_CROSSLETS_INFO
- peripheral_name: sdp/sdp_nof_crosslets
mm_port_names:
- REG_NOF_CROSSLETS
- peripheral_name: common/common_variable_delay
peripheral_group: xst
mm_port_names:
- REG_STAT_ENABLE_XST
- peripheral_name: sdp/sdp_statistics_offload_hdr_dat_xst
peripheral_group: xst
mm_port_names:
- REG_STAT_HDR_DAT_XST
#############################################################################
# BF = Beamformer (from node_sdp_beamformer.vhd)
#############################################################################
- peripheral_name: reorder/reorder_col_wide
number_of_peripherals: c_N_beamsets
peripheral_span: ceil_pow2(c_P_pfb) * ceil_pow2(c_S_sub_bf * c_Q_fft) * MM_BUS_SIZE # number_of_ports = c_P_pfb, mm_port_span = ceil_pow2(c_S_sub_bf * c_Q_fft) words
parameter_overrides:
- { name: g_wb_factor, value: c_P_pfb }
- { name: g_nof_ch_in, value: c_N_sub * c_Q_fft }
- { name: g_nof_ch_sel, value: c_S_sub_bf * c_Q_fft }
mm_port_names:
- RAM_SS_SS_WIDE
- peripheral_name: sdp/sdp_bf_weights
number_of_peripherals: c_N_beamsets
peripheral_span: ceil_pow2(c_N_pol_bf * c_P_pfb) * ceil_pow2(c_Q_fft * c_S_sub_bf) * MM_BUS_SIZE # number_of_ports = c_N_pol_bf * c_P_pfb, mm_port_span = ceil_pow2(c_Q_fft * c_S_sub_bf) words
mm_port_names:
- RAM_BF_WEIGHTS
- peripheral_name: sdp/sdp_bf_scale
number_of_peripherals: c_N_beamsets
peripheral_span: 2 * MM_BUS_SIZE # number_of_ports = 1, mm_port_span = 2 words
parameter_overrides:
- { name: g_gain_w, value: c_W_beamlet_scale }
- { name: g_lsb_w, value: 0 - c_W_beamlet_resolution}
mm_port_names:
- REG_BF_SCALE
- peripheral_name: sdp/sdp_beamformer_output_hdr_dat
number_of_peripherals: c_N_beamsets
peripheral_span: 64 * MM_BUS_SIZE # number_of_ports = 1, mm_port_span = 64 words
mm_port_names:
- REG_HDR_DAT
- peripheral_name: dp/dp_xonoff
number_of_peripherals: c_N_beamsets
peripheral_span: 2 * MM_BUS_SIZE # number_of_ports = 1, mm_port_span = 2 words
parameter_overrides:
- { name: g_nof_streams, value: 1 }
- { name: g_combine_streams, value: False }
mm_port_names:
- REG_DP_XONOFF
- peripheral_name: st/st_bst_for_sdp
number_of_peripherals: c_N_beamsets
peripheral_span: ceil_pow2(c_stat_data_sz * c_S_sub_bf * c_N_pol_bf) * MM_BUS_SIZE # number_of_ports = 1, mm_port_span = ceil_pow2(c_stat_data_sz * c_S_sub_bf * c_N_pol_bf) words
mm_port_names:
- RAM_ST_BST
- peripheral_name: common/common_variable_delay
peripheral_group: bst
number_of_peripherals: c_N_beamsets
peripheral_span: 2 * MM_BUS_SIZE # number_of_ports = 1, mm_port_span = 2 words
mm_port_names:
- REG_STAT_ENABLE_BST
- peripheral_name: sdp/sdp_statistics_offload_hdr_dat_bst
peripheral_group: bst
number_of_peripherals: c_N_beamsets
peripheral_span: 64 * MM_BUS_SIZE # number_of_ports = 1, mm_port_span = 64 words
mm_port_names:
- REG_STAT_HDR_DAT_BST
- peripheral_name: nw_10GbE/nw_10GbE_unb2legacy
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_MAC
- peripheral_name: nw_10GbE/nw_10GbE_eth10g
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_ETH10G
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