Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
H
HDL
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Iterations
Wiki
Requirements
Jira
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Container registry
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
GitLab community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
RTSD
HDL
Commits
8a8e0d4e
Commit
8a8e0d4e
authored
3 years ago
by
Reinier van der Walle
Browse files
Options
Downloads
Patches
Plain Diff
processed review comments
parent
66388645
Branches
Branches containing commit
No related tags found
1 merge request
!142
Resolve L2SDP-411
Changes
2
Show whitespace changes
Inline
Side-by-side
Showing
2 changed files
libraries/base/common/src/vhdl/common_pkg.vhd
+2
-1
2 additions, 1 deletion
libraries/base/common/src/vhdl/common_pkg.vhd
libraries/dsp/rTwoSDF/src/vhdl/rTwoWMul.vhd
+1
-1
1 addition, 1 deletion
libraries/dsp/rTwoSDF/src/vhdl/rTwoWMul.vhd
with
3 additions
and
2 deletions
libraries/base/common/src/vhdl/common_pkg.vhd
+
2
−
1
View file @
8a8e0d4e
...
@@ -99,7 +99,8 @@ PACKAGE common_pkg IS
...
@@ -99,7 +99,8 @@ PACKAGE common_pkg IS
-- DSP
-- DSP
CONSTANT
c_dsp_mult_w
:
NATURAL
:
=
18
;
-- Width of the embedded multipliers in Stratix IV (and Arria 10 for 2 multipliers per DSP block)
CONSTANT
c_dsp_mult_w
:
NATURAL
:
=
18
;
-- Width of the embedded multipliers in Stratix IV (and Arria 10 for 2 multipliers per DSP block)
CONSTANT
c_dsp_mult_arria10_w
:
NATURAL
:
=
27
;
-- Width of the embedded multipliers in Arria 10
CONSTANT
c_dsp_mult_18_w
:
NATURAL
:
=
18
;
-- Width of the embedded multipliers in Stratix IV (and Arria 10 for 2 multipliers per DSP block)
CONSTANT
c_dsp_mult_27_w
:
NATURAL
:
=
27
;
-- Width of the embedded multipliers in Arria 10
-- TYPE DECLARATIONS --------------------------------------------------------
-- TYPE DECLARATIONS --------------------------------------------------------
TYPE
t_boolean_arr
IS
ARRAY
(
INTEGER
RANGE
<>
)
OF
BOOLEAN
;
-- INTEGER left index starts default at -2**31
TYPE
t_boolean_arr
IS
ARRAY
(
INTEGER
RANGE
<>
)
OF
BOOLEAN
;
-- INTEGER left index starts default at -2**31
...
...
This diff is collapsed.
Click to expand it.
libraries/dsp/rTwoSDF/src/vhdl/rTwoWMul.vhd
+
1
−
1
View file @
8a8e0d4e
...
@@ -70,7 +70,7 @@ architecture str of rTwoWMul is
...
@@ -70,7 +70,7 @@ architecture str of rTwoWMul is
constant
c_mult_extra_lat
:
natural
:
=
sel_a_b
(
c_lat
>
3
,
c_lat
-3
,
0
);
-- remaining extra pipelining in logic
constant
c_mult_extra_lat
:
natural
:
=
sel_a_b
(
c_lat
>
3
,
c_lat
-3
,
0
);
-- remaining extra pipelining in logic
constant
c_mult_output_lat
:
natural
:
=
sel_a_b
(
c_lat
>
0
,
1
,
0
)
+
c_mult_extra_lat
;
-- first priority use DSP pipeline output
constant
c_mult_output_lat
:
natural
:
=
sel_a_b
(
c_lat
>
0
,
1
,
0
)
+
c_mult_extra_lat
;
-- first priority use DSP pipeline output
constant
c_mult_lat
:
natural
:
=
c_mult_input_lat
+
c_mult_product_lat
+
c_mult_adder_lat
+
c_mult_output_lat
;
constant
c_mult_lat
:
natural
:
=
c_mult_input_lat
+
c_mult_product_lat
+
c_mult_adder_lat
+
c_mult_output_lat
;
constant
c_max_dsp_mult_w
:
natural
:
=
sel_a_b
(
g_technology
=
c_tech_stratixiv
,
c_dsp_mult_w
,
c_dsp_mult_
arria10
_w
);
constant
c_max_dsp_mult_w
:
natural
:
=
sel_a_b
(
g_technology
=
c_tech_stratixiv
,
c_dsp_mult_
18_
w
,
c_dsp_mult_
27
_w
);
-- Total input to output latency
-- Total input to output latency
constant
c_total_lat
:
natural
:
=
c_mult_lat
+
c_round_lat
;
constant
c_total_lat
:
natural
:
=
c_mult_lat
+
c_round_lat
;
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment