UPdated log_first_bsn

applications/apertif/designs/apertif_unb1_correlator/src/vhdl/node_apertif_unb1_correlator_mesh.vhd

@@ -651,7 +651,7 @@ BEGIN
     g_bsn_w              => c_dp_stream_bsn_w,
     g_cnt_sop_w          => c_word_w,
     g_cnt_valid_w        => c_word_w,
-    g_log_first_bsn      => TRUE
+    g_log_first_bsn      => FALSE
   )
   PORT MAP (
     -- Memory-mapped clock domain