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RTSD
HDL
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Commit
877c339e
authored
3 years ago
by
Eric Kooistra
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Readback current active WG ctrl via mon_ctrl. Verified mon_ctrl in tb_diag_wg_wideband.vhd.
parent
ba49caa0
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!210
MM readback the currently active crosslets info, instead of the initial MM...
Pipeline
#25794
passed
3 years ago
Stage: simulation
Stage: synthesis
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5
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