small changes in the description of st_histogram_8_april

libraries/dsp/st/src/vhdl/st_histogram_8_april.vhd

@@ -94,20 +94,22 @@ ARCHITECTURE rtl OF st_histogram_8_april IS
 BEGIN 
 
   -----------------------------------------------------------------------------
-  -- Bin reader: Convert snk_in data to bin_reader_mosi with read request
+  -- Bin reader: Convert snk_in data to bin_reader_mosi with read request 
+  --             and generate signals for detection of problems in the 
+  --             consecutive data.
   -- . in  : snk_in               (latency: 0)
-  -- . in  : bin_arbiter_rd_miso  (latency: 2)
+  --       : bin_arbiter_rd_miso  (latency: 2)
   -- . out : init_phase           (latency: 0 ?
-  -- . out : bin_reader_mosi      (latency: 0)
-  -- . out : prev_bin_reader_mosi (latency: 1)
-  -- . out : bin_reader_mosi_pp   (latency: 2)
-  -- . out : bin_reader_mosi_ppp  (latency: 3)
-  -- . out : bin_reader_rd_miso   (latency: 2)
-  -- - out : rd_cnt_allowed_pp    (latency: 2)
-  -- . out : same_r_w_address_pp  (latency: 2)
-  -- . out : toggle_detect_pp     (latency: 2)
-  -- . out : sync_detect          (latency: 0)
-  -- . out : sync_detect_pp       (latency: 2)
+  --       : bin_reader_mosi      (latency: 0)
+  --       : prev_bin_reader_mosi (latency: 1)
+  --       : bin_reader_mosi_pp   (latency: 2)
+  --       : bin_reader_mosi_ppp  (latency: 3)
+  --       : bin_reader_rd_miso   (latency: 2)
+  --       : rd_cnt_allowed_pp    (latency: 2)
+  --       : same_r_w_address_pp  (latency: 2)
+  --       : toggle_detect_pp     (latency: 2)
+  --       : sync_detect          (latency: 0)
+  --       : sync_detect_pp       (latency: 2)
   -----------------------------------------------------------------------------
   bin_reader_mosi.rd                          <= snk_in.valid; -- when 1, count allowed
   bin_reader_mosi.address(c_adr_w-1 DOWNTO 0) <= snk_in.data(g_in_data_w-1 DOWNTO c_adr_low);