corrected temp_alarm

libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd

@@ -21,7 +21,10 @@
 
 -- Purpose:
 -- Description:
---  
+--  For temperature calculation see:
+--  https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_alttemp_sense.pdf
+--  Which states Temperature = ( (A * C) / 1024 ) - B
+--  Where A = 693, B = 265, C = decimal value of tempout[9..0] (unsigned)
 
 
 LIBRARY IEEE, common_lib, technology_lib, tech_fpga_temp_sens_lib, tech_fpga_voltage_sens_lib;
@@ -65,8 +68,8 @@ ARCHITECTURE str OF fpga_sense IS
   CONSTANT c_mem_reg_temp_nof_data  : NATURAL := 1;
   CONSTANT c_mem_reg_temp_data : t_c_mem := (c_mem_reg_rd_latency, c_mem_reg_temp_adr_w , c_mem_reg_temp_dat_w , c_mem_reg_temp_nof_data, 'X');
 
-  -- temp = (708 * adc)/1024 - 273 => adc = (temp + 273)*1024/708                                                             
-  CONSTANT c_temp_high_raw : STD_LOGIC_VECTOR(9 downto 0) := TO_UVEC(((g_temp_high + 273) * 1024) / 708, 10);
+  -- temp = (693 * adc)/1024 - 265 => adc = (temp + 265)*1024/693                                                             
+  CONSTANT c_temp_high_raw : STD_LOGIC_VECTOR(9 downto 0) := TO_UVEC(((g_temp_high + 265) * 1024) / 693, 10);
 
   -- constants for the voltage sensor	
   CONSTANT c_mem_reg_voltage_adr_w     : NATURAL := 1;
@@ -89,7 +92,7 @@ ARCHITECTURE str OF fpga_sense IS
 BEGIN
 
   -- temperature sensor
-  temp_alarm <= '1' WHEN (SIGNED(temp_data) > SIGNED(c_temp_high_raw)) ELSE '0';
+  temp_alarm <= '1' WHEN (UNSIGNED(temp_data) > UNSIGNED(c_temp_high_raw)) ELSE '0';
   gen_tech_fpga_temp_sens: IF g_sim=FALSE GENERATE
     u_tech_fpga_temp_sens : ENTITY tech_fpga_temp_sens_lib.tech_fpga_temp_sens
     GENERIC MAP (