Use default reg_io_ddr_mosi input value to allow not connecting it.

libraries/io/ddr/src/vhdl/io_ddr.vhd

@@ -181,11 +181,11 @@ ENTITY io_ddr IS
     ctlr_rst_in        : IN    STD_LOGIC;  -- connect ctlr_rst_out to ctlr_rst_in at top level
     
     -- MM clock + reset
-    mm_rst             : IN    STD_LOGIC;                                           
-    mm_clk             : IN    STD_LOGIC; 
+    mm_rst             : IN    STD_LOGIC := '1';                                           
+    mm_clk             : IN    STD_LOGIC := '0'; 
     
-    -- MM register map for DDR controller status info
-    reg_io_ddr_mosi    : IN    t_mem_mosi;
+    -- MM interface
+    reg_io_ddr_mosi    : IN    t_mem_mosi := c_mem_mosi_rst;  -- register for DDR controller status info
     reg_io_ddr_miso    : OUT   t_mem_miso;
     
     -- Driver clock domain