-Added comment;

-Fixed address width assignment for data buffers.

applications/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd

@@ -112,6 +112,7 @@ ARCHITECTURE str OF mmm_unb1_correlator IS
 
   -----------------------------------------------------------------------------
   -- this component declaration is copy-pasted from Quartus v11.1 QSYS builder
+  -- . Note the SLV->SL edits, e.g. coe_address_export_from_the_reg_wdi.
   -----------------------------------------------------------------------------
   component qsys_unb1_correlator is
       port (
@@ -328,7 +329,7 @@ BEGIN
       ram_diag_data_buf_read_export                 => ram_diag_data_buf_mosi.rd,      
       ram_diag_data_buf_writedata_export            => ram_diag_data_buf_mosi.wrdata(c_word_w-1 DOWNTO 0),       
       ram_diag_data_buf_write_export                => ram_diag_data_buf_mosi.wr,       
-      ram_diag_data_buf_address_export              => ram_diag_data_buf_mosi.address,       
+      ram_diag_data_buf_address_export              => ram_diag_data_buf_mosi.address(16 DOWNTO 0),       
       ram_diag_data_buf_clk_export                  => OPEN,     
       ram_diag_data_buf_reset_export                => OPEN,   
     
@@ -336,7 +337,7 @@ BEGIN
       reg_diag_data_buf_read_export                 => reg_diag_data_buf_mosi.rd,        
       reg_diag_data_buf_writedata_export            => reg_diag_data_buf_mosi.wrdata(c_word_w-1 DOWNTO 0),       
       reg_diag_data_buf_write_export                => reg_diag_data_buf_mosi.wr,       
-      reg_diag_data_buf_address_export              => reg_diag_data_buf_mosi.address,       
+      reg_diag_data_buf_address_export              => reg_diag_data_buf_mosi.address(9 DOWNTO 0),       
       reg_diag_data_buf_clk_export                  => OPEN,
       reg_diag_data_buf_reset_export                => OPEN
       );