From 77b566639af9a7ee7b79011fcdd835af326adb70 Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Tue, 18 Nov 2014 16:13:11 +0000
Subject: [PATCH] -Added comment; -Fixed address width assignment for data
buffers.
---
.../unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/applications/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd b/applications/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
index dd6fbcb5a1..e511bc0358 100644
--- a/applications/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
+++ b/applications/unb1_correlator/src/vhdl/mmm_unb1_correlator.vhd
@@ -112,6 +112,7 @@ ARCHITECTURE str OF mmm_unb1_correlator IS
-----------------------------------------------------------------------------
-- this component declaration is copy-pasted from Quartus v11.1 QSYS builder
+ -- . Note the SLV->SL edits, e.g. coe_address_export_from_the_reg_wdi.
-----------------------------------------------------------------------------
component qsys_unb1_correlator is
port (
@@ -328,7 +329,7 @@ BEGIN
ram_diag_data_buf_read_export => ram_diag_data_buf_mosi.rd,
ram_diag_data_buf_writedata_export => ram_diag_data_buf_mosi.wrdata(c_word_w-1 DOWNTO 0),
ram_diag_data_buf_write_export => ram_diag_data_buf_mosi.wr,
- ram_diag_data_buf_address_export => ram_diag_data_buf_mosi.address,
+ ram_diag_data_buf_address_export => ram_diag_data_buf_mosi.address(16 DOWNTO 0),
ram_diag_data_buf_clk_export => OPEN,
ram_diag_data_buf_reset_export => OPEN,
@@ -336,7 +337,7 @@ BEGIN
reg_diag_data_buf_read_export => reg_diag_data_buf_mosi.rd,
reg_diag_data_buf_writedata_export => reg_diag_data_buf_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_diag_data_buf_write_export => reg_diag_data_buf_mosi.wr,
- reg_diag_data_buf_address_export => reg_diag_data_buf_mosi.address,
+ reg_diag_data_buf_address_export => reg_diag_data_buf_mosi.address(9 DOWNTO 0),
reg_diag_data_buf_clk_export => OPEN,
reg_diag_data_buf_reset_export => OPEN
);
--
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