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Commit 72b49e58 authored by Eric Kooistra's avatar Eric Kooistra
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Rename gen_stratixiv into gen_ip_stratixiv.

parent 81299e49
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...@@ -57,7 +57,7 @@ ARCHITECTURE str OF tech_flash_asmi_parallel IS ...@@ -57,7 +57,7 @@ ARCHITECTURE str OF tech_flash_asmi_parallel IS
BEGIN BEGIN
gen_stratixiv : IF g_technology=c_tech_stratixiv GENERATE gen_ip_stratixiv : IF g_technology=c_tech_stratixiv GENERATE
u0 : ip_stratixiv_asmi_parallel u0 : ip_stratixiv_asmi_parallel
PORT MAP (addr, clkin, datain, rden, read, sector_erase, shift_bytes, wren, write, busy, data_valid, dataout, illegal_erase, illegal_write); PORT MAP (addr, clkin, datain, rden, read, sector_erase, shift_bytes, wren, write, busy, data_valid, dataout, illegal_erase, illegal_write);
END GENERATE; END GENERATE;
......
...@@ -53,7 +53,7 @@ ARCHITECTURE str OF tech_flash_remote_update IS ...@@ -53,7 +53,7 @@ ARCHITECTURE str OF tech_flash_remote_update IS
BEGIN BEGIN
gen_stratixiv : IF g_technology=c_tech_stratixiv GENERATE gen_ip_stratixiv : IF g_technology=c_tech_stratixiv GENERATE
u0 : ip_stratixiv_remote_update u0 : ip_stratixiv_remote_update
PORT MAP (clock, data_in, param, read_param, reconfig, reset, reset_timer, write_param, busy, data_out); PORT MAP (clock, data_in, param, read_param, reconfig, reset, reset_timer, write_param, busy, data_out);
END GENERATE; END GENERATE;
......
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