Removed g_use_ddr_memory_model so the DDR memory model code is not seen/needed...

Removed g_use_ddr_memory_model so the DDR memory model code is not seen/needed by synthesis. Instead only support DDR memory model instantiation in test bench.

libraries/technology/ddr/hdllib.cfg

@@ -20,9 +20,9 @@ synth_files =
     tech_ddr_stratixiv.vhd
     tech_ddr_arria10.vhd
     
-    tech_ddr_mem_model_component_pkg.vhd
-    tech_ddr_mem_model.vhd
-    
     tech_ddr.vhd
 
 test_bench_files =
+    tech_ddr_mem_model_component_pkg.vhd
+    tech_ddr_mem_model.vhd
+