From 7095b4856046b8bd970cf5632437781bbf7bc4db Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Wed, 8 Apr 2015 14:27:28 +0000
Subject: [PATCH] Removed g_use_ddr_memory_model so the DDR memory model code
is not seen/needed by synthesis. Instead only support DDR memory model
instantiation in test bench.
---
libraries/technology/ddr/hdllib.cfg | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/libraries/technology/ddr/hdllib.cfg b/libraries/technology/ddr/hdllib.cfg
index bd487ba61f..e33b21e3d7 100644
--- a/libraries/technology/ddr/hdllib.cfg
+++ b/libraries/technology/ddr/hdllib.cfg
@@ -20,9 +20,9 @@ synth_files =
tech_ddr_stratixiv.vhd
tech_ddr_arria10.vhd
- tech_ddr_mem_model_component_pkg.vhd
- tech_ddr_mem_model.vhd
-
tech_ddr.vhd
test_bench_files =
+ tech_ddr_mem_model_component_pkg.vhd
+ tech_ddr_mem_model.vhd
+
--
GitLab