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RTSD
HDL
Commits
6cb3a437
Commit
6cb3a437
authored
10 years ago
by
Eric Kooistra
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Do not use *_arr(0 DOWNTO 0), instead use direct single signal ports.
parent
38a571c9
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libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
+22
-22
22 additions, 22 deletions
...aries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
with
22 additions
and
22 deletions
libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
+
22
−
22
View file @
6cb3a437
...
...
@@ -25,7 +25,7 @@
-- . Support PHY serial layer connect with optional link_fault
-- . Support link delay
LIBRARY
IEEE
,
common_lib
,
dp_lib
;
LIBRARY
IEEE
,
common_lib
;
USE
IEEE
.
std_logic_1164
.
ALL
;
USE
common_lib
.
common_pkg
.
ALL
;
USE
common_lib
.
common_interface_layers_pkg
.
ALL
;
...
...
@@ -37,22 +37,22 @@ ENTITY tb_tech_mac_10g_link_connect IS
g_link_delay
:
TIME
:
=
0
ns
);
PORT
(
link_fault
:
IN
STD_LOGIC
:
=
'0'
;
-- when '1' then forces rx_serial
_arr(0)
='0'
link_fault
:
IN
STD_LOGIC
:
=
'0'
;
-- when '1' then forces rx_serial='0'
-- XGMII layer connect
xgmii_tx_data
:
IN
STD_LOGIC_VECTOR
(
c_xgmii_w
-1
DOWNTO
0
)
:
=
(
OTHERS
=>
'X'
);
-- 72 bit
xgmii_rx_data
:
OUT
STD_LOGIC_VECTOR
(
c_xgmii_w
-1
DOWNTO
0
);
-- 72 bit
-- 10GBASE-R serial layer connect
serial_tx
_arr
:
IN
STD_LOGIC
_VECTOR
(
0
DOWNTO
0
)
:
=
(
OTHERS
=>
'X'
)
;
serial_rx
_arr
:
OUT
STD_LOGIC
_VECTOR
(
0
DOWNTO
0
);
-- connects to delayed serial_tx
_arr(0)
when g_loopback=TRUE else to serial_rx_in
serial_tx_out
:
OUT
STD_LOGIC
;
-- connects to delayed serial_tx
_arr(0)
serial_tx
:
IN
STD_LOGIC
:
=
'X'
;
serial_rx
:
OUT
STD_LOGIC
;
-- connects to delayed serial_tx when g_loopback=TRUE else to serial_rx_in
serial_tx_out
:
OUT
STD_LOGIC
;
-- connects to delayed serial_tx
serial_rx_in
:
IN
STD_LOGIC
:
=
'X'
;
-- used when g_loopback=FALSE
-- XAUI serial layer connect
xaui_tx
_arr
:
IN
t_xaui_arr
(
0
DOWNTO
0
)
:
=
(
OTHERS
=>
(
OTHERS
=>
'X'
)
)
;
xaui_rx
_arr
:
OUT
t_xaui_arr
(
0
DOWNTO
0
);
-- connects to delayed xaui_tx
_arr(0)
when g_loopback=TRUE else to xaui_rx_in
xaui_tx_out
:
OUT
STD_LOGIC_VECTOR
(
c_nof_xaui_lanes
-1
DOWNTO
0
);
-- connects to delayed xaui_tx
_arr(0)
xaui_tx
:
IN
STD_LOGIC_VECTOR
(
c_nof_xaui_lanes
-1
DOWNTO
0
)
:
=
(
OTHERS
=>
'X'
);
xaui_rx
:
OUT
STD_LOGIC_VECTOR
(
c_nof_xaui_lanes
-1
DOWNTO
0
);
-- connects to delayed xaui_tx when g_loopback=TRUE else to xaui_rx_in
xaui_tx_out
:
OUT
STD_LOGIC_VECTOR
(
c_nof_xaui_lanes
-1
DOWNTO
0
);
-- connects to delayed xaui_tx
xaui_rx_in
:
IN
STD_LOGIC_VECTOR
(
c_nof_xaui_lanes
-1
DOWNTO
0
)
:
=
(
OTHERS
=>
'X'
)
-- used when g_loopback=FALSE
);
END
tb_tech_mac_10g_link_connect
;
...
...
@@ -60,8 +60,8 @@ END tb_tech_mac_10g_link_connect;
ARCHITECTURE
tb
OF
tb_tech_mac_10g_link_connect
IS
SIGNAL
serial_tx_
arr_
dly
:
STD_LOGIC
_VECTOR
(
0
DOWNTO
0
)
;
SIGNAL
xaui_tx_
arr_
dly
:
t_xaui_arr
(
0
DOWNTO
0
);
SIGNAL
serial_tx_dly
:
STD_LOGIC
;
SIGNAL
xaui_tx_dly
:
STD_LOGIC_VECTOR
(
c_nof_xaui_lanes
-1
DOWNTO
0
);
BEGIN
-----------------------------------------------------------------------------
...
...
@@ -72,36 +72,36 @@ BEGIN
-----------------------------------------------------------------------------
-- 10GBASE-R serial layer link
-----------------------------------------------------------------------------
serial_tx_
arr_
dly
<=
TRANSPORT
serial_tx
_arr
AFTER
g_link_delay
;
serial_tx_out
<=
serial_tx_
arr_dly
(
0
)
;
serial_tx_dly
<=
TRANSPORT
serial_tx
AFTER
g_link_delay
;
serial_tx_out
<=
serial_tx_
dly
;
p_serial_rx
:
PROCESS
(
serial_tx_
arr_
dly
,
serial_rx_in
,
link_fault
)
p_serial_rx
:
PROCESS
(
serial_tx_dly
,
serial_rx_in
,
link_fault
)
BEGIN
IF
g_loopback
=
TRUE
THEN
serial_rx
_arr
<=
serial_tx_
arr_
dly
;
serial_rx
<=
serial_tx_dly
;
ELSE
serial_rx
_arr
(
0
)
<=
serial_rx_in
;
serial_rx
<=
serial_rx_in
;
END
IF
;
IF
link_fault
=
'1'
THEN
serial_rx
_arr
(
0
)
<=
'0'
;
serial_rx
<=
'0'
;
END
IF
;
END
PROCESS
;
-----------------------------------------------------------------------------
-- XAUI serial layer link
-----------------------------------------------------------------------------
xaui_tx_
arr_
dly
<=
TRANSPORT
xaui_tx
_arr
AFTER
g_link_delay
;
xaui_tx_out
<=
xaui_tx_
arr_dly
(
0
)
;
xaui_tx_dly
<=
TRANSPORT
xaui_tx
AFTER
g_link_delay
;
xaui_tx_out
<=
xaui_tx_
dly
;
p_xaui_rx
:
PROCESS
(
xaui_tx_
arr_
dly
,
xaui_rx_in
,
link_fault
)
p_xaui_rx
:
PROCESS
(
xaui_tx_dly
,
xaui_rx_in
,
link_fault
)
BEGIN
IF
g_loopback
=
TRUE
THEN
xaui_rx
_arr
<=
xaui_tx_
arr_
dly
;
xaui_rx
<=
xaui_tx_dly
;
ELSE
xaui_rx
_arr
(
0
)
<=
xaui_rx_in
;
xaui_rx
<=
xaui_rx_in
;
END
IF
;
IF
link_fault
=
'1'
THEN
xaui_rx
_arr
(
0
)
<=
(
OTHERS
=>
'0'
);
xaui_rx
<=
(
OTHERS
=>
'0'
);
END
IF
;
END
PROCESS
;
...
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