From 6cb3a437c982f6f019df84a7dfabd3e4070da93a Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Wed, 10 Dec 2014 13:09:54 +0000
Subject: [PATCH] Do not use *_arr(0 DOWNTO 0), instead use direct single
signal ports.
---
.../mac_10g/tb_tech_mac_10g_link_connect.vhd | 44 +++++++++----------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd b/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
index 27603f4efd..eb633722f5 100644
--- a/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
+++ b/libraries/technology/mac_10g/tb_tech_mac_10g_link_connect.vhd
@@ -25,7 +25,7 @@
-- . Support PHY serial layer connect with optional link_fault
-- . Support link delay
-LIBRARY IEEE, common_lib, dp_lib;
+LIBRARY IEEE, common_lib;
USE IEEE.std_logic_1164.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_interface_layers_pkg.ALL;
@@ -37,22 +37,22 @@ ENTITY tb_tech_mac_10g_link_connect IS
g_link_delay : TIME := 0 ns
);
PORT (
- link_fault : IN STD_LOGIC := '0'; -- when '1' then forces rx_serial_arr(0)='0'
+ link_fault : IN STD_LOGIC := '0'; -- when '1' then forces rx_serial='0'
-- XGMII layer connect
xgmii_tx_data : IN STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0) := (OTHERS=>'X'); -- 72 bit
xgmii_rx_data : OUT STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0); -- 72 bit
-- 10GBASE-R serial layer connect
- serial_tx_arr : IN STD_LOGIC_VECTOR(0 DOWNTO 0) := (OTHERS=>'X');
- serial_rx_arr : OUT STD_LOGIC_VECTOR(0 DOWNTO 0); -- connects to delayed serial_tx_arr(0) when g_loopback=TRUE else to serial_rx_in
- serial_tx_out : OUT STD_LOGIC; -- connects to delayed serial_tx_arr(0)
+ serial_tx : IN STD_LOGIC := 'X';
+ serial_rx : OUT STD_LOGIC; -- connects to delayed serial_tx when g_loopback=TRUE else to serial_rx_in
+ serial_tx_out : OUT STD_LOGIC; -- connects to delayed serial_tx
serial_rx_in : IN STD_LOGIC := 'X'; -- used when g_loopback=FALSE
-- XAUI serial layer connect
- xaui_tx_arr : IN t_xaui_arr(0 DOWNTO 0) := (OTHERS=>(OTHERS=>'X'));
- xaui_rx_arr : OUT t_xaui_arr(0 DOWNTO 0); -- connects to delayed xaui_tx_arr(0) when g_loopback=TRUE else to xaui_rx_in
- xaui_tx_out : OUT STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0); -- connects to delayed xaui_tx_arr(0)
+ xaui_tx : IN STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0) := (OTHERS=>'X');
+ xaui_rx : OUT STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0); -- connects to delayed xaui_tx when g_loopback=TRUE else to xaui_rx_in
+ xaui_tx_out : OUT STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0); -- connects to delayed xaui_tx
xaui_rx_in : IN STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0) := (OTHERS=>'X') -- used when g_loopback=FALSE
);
END tb_tech_mac_10g_link_connect;
@@ -60,8 +60,8 @@ END tb_tech_mac_10g_link_connect;
ARCHITECTURE tb OF tb_tech_mac_10g_link_connect IS
- SIGNAL serial_tx_arr_dly : STD_LOGIC_VECTOR(0 DOWNTO 0);
- SIGNAL xaui_tx_arr_dly : t_xaui_arr(0 DOWNTO 0);
+ SIGNAL serial_tx_dly : STD_LOGIC;
+ SIGNAL xaui_tx_dly : STD_LOGIC_VECTOR(c_nof_xaui_lanes-1 DOWNTO 0);
BEGIN
-----------------------------------------------------------------------------
@@ -72,36 +72,36 @@ BEGIN
-----------------------------------------------------------------------------
-- 10GBASE-R serial layer link
-----------------------------------------------------------------------------
- serial_tx_arr_dly <= TRANSPORT serial_tx_arr AFTER g_link_delay;
- serial_tx_out <= serial_tx_arr_dly(0);
+ serial_tx_dly <= TRANSPORT serial_tx AFTER g_link_delay;
+ serial_tx_out <= serial_tx_dly;
- p_serial_rx : PROCESS(serial_tx_arr_dly, serial_rx_in, link_fault)
+ p_serial_rx : PROCESS(serial_tx_dly, serial_rx_in, link_fault)
BEGIN
IF g_loopback=TRUE THEN
- serial_rx_arr <= serial_tx_arr_dly;
+ serial_rx <= serial_tx_dly;
ELSE
- serial_rx_arr(0) <= serial_rx_in;
+ serial_rx <= serial_rx_in;
END IF;
IF link_fault='1' THEN
- serial_rx_arr(0) <= '0';
+ serial_rx <= '0';
END IF;
END PROCESS;
-----------------------------------------------------------------------------
-- XAUI serial layer link
-----------------------------------------------------------------------------
- xaui_tx_arr_dly <= TRANSPORT xaui_tx_arr AFTER g_link_delay;
- xaui_tx_out <= xaui_tx_arr_dly(0);
+ xaui_tx_dly <= TRANSPORT xaui_tx AFTER g_link_delay;
+ xaui_tx_out <= xaui_tx_dly;
- p_xaui_rx : PROCESS(xaui_tx_arr_dly, xaui_rx_in, link_fault)
+ p_xaui_rx : PROCESS(xaui_tx_dly, xaui_rx_in, link_fault)
BEGIN
IF g_loopback=TRUE THEN
- xaui_rx_arr <= xaui_tx_arr_dly;
+ xaui_rx <= xaui_tx_dly;
ELSE
- xaui_rx_arr(0) <= xaui_rx_in;
+ xaui_rx <= xaui_rx_in;
END IF;
IF link_fault='1' THEN
- xaui_rx_arr(0) <= (OTHERS=>'0');
+ xaui_rx <= (OTHERS=>'0');
END IF;
END PROCESS;
--
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