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Commit 5f9f5bfe authored by Eric Kooistra's avatar Eric Kooistra
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Improve input register stage, to avoid direct use of ref_sync for cnt_en..

parent 8e63f0f9
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1 merge request!292Use default 0 for nxt_info to avoid X to decimal conversion error in sim_io.py...
Pipeline #39658 passed
Stage: simulation
Stage: synthesis