cleanup

libraries/base/dp/src/vhdl/dp_bsn_monitor_v2.vhd

@@ -85,6 +85,12 @@ ARCHITECTURE rtl OF dp_bsn_monitor_v2 IS
   CONSTANT c_cnt_valid_w    : NATURAL := mon_nof_valid'LENGTH;
   CONSTANT c_cnt_latency_w  : NATURAL := mon_latency'LENGTH;
 
+  CONSTANT inv_mon_bsn_at_sync       : STD_LOGIC_VECTOR(c_bsn_w-1 DOWNTO 0) := (OTHERS => '1');
+  CONSTANT inv_mon_nof_sop           : STD_LOGIC_VECTOR(c_cnt_sop_w-1 DOWNTO 0) := (OTHERS => '1');
+  CONSTANT inv_mon_nof_err           : STD_LOGIC_VECTOR(c_cnt_sop_w-1 DOWNTO 0) := (OTHERS => '1');
+  CONSTANT inv_mon_nof_valid         : STD_LOGIC_VECTOR(c_cnt_valid_w-1 DOWNTO 0) := (OTHERS => '1');
+  CONSTANT inv_mon_latency           : STD_LOGIC_VECTOR(c_cnt_latency_w-1 DOWNTO 0) := (OTHERS => '1');
+
   SIGNAL ready                       : STD_LOGIC;
   SIGNAL nxt_ready                   : STD_LOGIC;
   SIGNAL ready_stable                : STD_LOGIC;
@@ -120,12 +126,6 @@ ARCHITECTURE rtl OF dp_bsn_monitor_v2 IS
   SIGNAL i_mon_latency               : STD_LOGIC_VECTOR(c_cnt_latency_w-1 DOWNTO 0);
   SIGNAL i_current_bsn               : STD_LOGIC_VECTOR(c_bsn_w-1 DOWNTO 0);
 
-  SIGNAL inv_mon_bsn_at_sync         : STD_LOGIC_VECTOR(c_bsn_w-1 DOWNTO 0) := (OTHERS => '1');
-  SIGNAL inv_mon_nof_sop             : STD_LOGIC_VECTOR(c_cnt_sop_w-1 DOWNTO 0) := (OTHERS => '1');
-  SIGNAL inv_mon_nof_err             : STD_LOGIC_VECTOR(c_cnt_sop_w-1 DOWNTO 0) := (OTHERS => '1');
-  SIGNAL inv_mon_nof_valid           : STD_LOGIC_VECTOR(c_cnt_valid_w-1 DOWNTO 0) := (OTHERS => '1');
-  SIGNAL inv_mon_latency             : STD_LOGIC_VECTOR(c_cnt_latency_w-1 DOWNTO 0) := (OTHERS => '1');
-
   SIGNAL sync_timeout_cnt            : STD_LOGIC_VECTOR(c_sync_timeout_w-1 DOWNTO 0);
   SIGNAL sync_timeout                : STD_LOGIC;
   SIGNAL sync_timeout_n              : STD_LOGIC;