Added remark on how this component relates to other DP components with similar purpose.

libraries/base/dp/src/vhdl/dp_block_gen_arr.vhd

@@ -118,7 +118,13 @@
 --              \--------------------/
 --
 -- Remarks:
--- . No siso flow control, although enable could be used as siso.xon
+-- . This dp_block_gen_arr relates to:
+--   - dp_dp_block_gen.vhd
+--   - dp_paged_sop_eop_reg.vhd
+--   - dp_fifo_info.vhd
+--   - dp_sync_checker.vhd
+-- . This dp_block_gen_arr has no siso flow control, although enable could be
+--   used as siso.xon
 -- . The channel, empty and err fields are passed on to the output. Typically
 --   these fields are not used with DSP data. However this scheme still
 --   allows setting these fields to a fixed value via snk_in.