From 59ec62e0ff41414f06f656c3fb773920044f548d Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Fri, 28 Oct 2016 13:56:02 +0000
Subject: [PATCH] Added remark on how this component relates to other DP
 components with similar purpose.

---
 libraries/base/dp/src/vhdl/dp_block_gen_arr.vhd | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/libraries/base/dp/src/vhdl/dp_block_gen_arr.vhd b/libraries/base/dp/src/vhdl/dp_block_gen_arr.vhd
index 4570b1f58a..b06d5ce104 100644
--- a/libraries/base/dp/src/vhdl/dp_block_gen_arr.vhd
+++ b/libraries/base/dp/src/vhdl/dp_block_gen_arr.vhd
@@ -118,7 +118,13 @@
 --              \--------------------/
 --
 -- Remarks:
--- . No siso flow control, although enable could be used as siso.xon
+-- . This dp_block_gen_arr relates to:
+--   - dp_dp_block_gen.vhd
+--   - dp_paged_sop_eop_reg.vhd
+--   - dp_fifo_info.vhd
+--   - dp_sync_checker.vhd
+-- . This dp_block_gen_arr has no siso flow control, although enable could be
+--   used as siso.xon
 -- . The channel, empty and err fields are passed on to the output. Typically
 --   these fields are not used with DSP data. However this scheme still
 --   allows setting these fields to a fixed value via snk_in.
-- 
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