Correct Tx FIFO size.

libraries/io/eth/src/vhdl/eth_tester_tx.vhd

@@ -79,8 +79,9 @@ ARCHITECTURE str OF eth_tester_tx IS
   -- level flow control via  bg_siso.xon. The input eop will release blocks
   -- for FIFO output already before the FIFO is fill level is reached.
   -- Choose FIFO size to fit one more packet on top of FIFO fill level.
-  CONSTANT c_fifo_fill            : NATURAL := c_eth_tester_bg_block_len_max * 11 / c_word_sz / 10;
-  CONSTANT c_fifo_size            : NATURAL := true_log_pow2(c_fifo_fill + c_eth_tester_bg_block_len_max);  -- = 8192
+  CONSTANT c_packet_sz_max        : NATURAL := ceil_div(c_eth_tester_bg_block_len_max, c_word_sz);
+  CONSTANT c_fifo_fill            : NATURAL := c_packet_sz_max * 11 / 10;
+  CONSTANT c_fifo_size            : NATURAL := true_log_pow2(c_fifo_fill + c_packet_sz_max);  -- = 8192
 
   CONSTANT c_nof_total_counts     : NATURAL := 1;  -- one to count Tx packets