ready for review!

applications/lofar2/libraries/ddrctrl/src/vhdl/ddrctrl_pack.vhd

@@ -18,17 +18,14 @@
 --
 -------------------------------------------------------------------------------
 -- Author: Job van Wee
--- Purpose: Create address by counting input valids
+-- Purpose: Make one data vector out of all the data from the t_dp_sosi_arr.
 --
 -- Description:
---  The counter starts on the first valid = '1' clockcylce, the counter stops 
---  when valid = '0'.
+--  The data from the t_dp_sosi_arr gets put into one data vector.
 --
 -- Remark:
 --  Use VHDL coding template from:
 --  https://support.astron.nl/confluence/display/SBe/VHDL+design+patterns+for+RTL+coding
---  The maximum value of the address is determend by g_tech_ddr.
-
 
 LIBRARY IEEE, dp_lib;
 USE IEEE.std_logic_1164.ALL;

applications/lofar2/libraries/ddrctrl/tb/vhdl/tb_ddrctrl_pack.vhd

@@ -109,7 +109,7 @@ BEGIN
     END IF;
   END PROCESS;
 
-  u_pack : ENTITY work.ddrctrl_pack
+  u_ddrctrl_pack : ENTITY work.ddrctrl_pack
   GENERIC MAP (
     g_nof_streams     => g_nof_streams,
     g_data_w          => g_data_w