Added comment in description on using mm_slave_mux.vhd ARGS to create an MM bus.

libraries/base/mm/src/vhdl/mm_bus.vhd

@@ -111,13 +111,16 @@
 --       M -----------|
 --                mm_master_mux
 --
---    The mm_slave_mux is useful to present an array of equal slave MM
---    ports via a single port on the MM bus. Otherwise the mm_bus could
---    instead directly present each slave MM array port.
---    The mm_slave_mux introduces hierarchy in the MM bus structure. This
---    can help to influcence the timing closure. Using only mm_bus or 
---    the a combination of mm_bus and mm_slave_mux can help to steer 
---    where pipelining is inserted in the MM bus.
+--   * The mm_slave_mux is useful to present an array of equal slave MM
+--     ports via a single port on the MM bus. Otherwise the mm_bus could
+--     instead directly present each slave MM array port.
+--     The mm_slave_mux introduces hierarchy in the MM bus structure. This
+--     can help to influcence the timing closure. Using only mm_bus or 
+--     the a combination of mm_bus and mm_slave_mux can help to steer 
+--     where pipelining is inserted in the MM bus.
+--   * The MM bus based on mm_bus could be automatically generated by ARGS
+--     based on a set of MM slave ports described in YAML configuration
+--     files.
 -- 
 -- Limitations:
 -- * A limitation is that if one slave has a read latency of 2 and another