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Commit 3148327c authored by Eric Kooistra's avatar Eric Kooistra
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Finished draft design for SDP ring. Updated on SDP planning.

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......@@ -80,140 +80,61 @@ No oversampled filterbank:
* SDP Workpackage (UniBoard2 HW + FW)
*******************************************************************************
Changed tasks:
- T4.6 : 20 weeks booked explicitely for Required documents
- T4.1 : 10 weeks, because GIT, RadioHDL finished
- T4.2 : 10 weeks, because some FW done
- T4.2 : ? weeks, hardware effort
Firmware FPGA images:
- the SDP has one main firmware design unb2c_sdp,
- the integrated design of SDP is revision unb2c_sdp_station,
- per task there are revisions of unb2c_sdp that contain subsets of the SDP functionality,
Deliverables (D): items that are needed for a milestone
Milestones (M) : 'cake moments' when you demonstrate deliverables
Deliverables (D) = an item, product : items that are needed for a milestone
Milestones (M) = a moment in time, achievement : 'cake moments' when you demonstrate or review
deliverables as part of a larger system
- integration passed
- review passed
Planning for LOFAR2.0 Station Workpackage 4 : Station Digital Processing
Tasks:
Below is the planning in weeks per task, the work includes:
- UniBoard2 hardware
- Firmware that runs on UniBoard2
INFRASTRUCTURE UniBoard2:
weeks nr task
20 1) Maintain firmware development environment
- using GIT
- using RadioHDL
- updating existing VHDL library components
D=> Operational firmware development environment
D=> VHDL libraries verified in simulation
weeks task description
10 T4.1 Maintain firmware development environment (GIT, RadioHDL, HDL libraries)
10 T4.2 UniBoard2 test firmware (enable mass production of UniBoard2)
? T4.2 UniBoard2 board hardware
20 T4.3 UniBoard2 board support package (BSP, M&C via Gemini Protocol, use ARGS for doc, C, VHDL)
10 T4.4 Network access via 10GbE (support ARP and ping)
20 t4.5 Ring access using test data and BSN monitor (support ring)
20 T4.6 Required documents (SDP RS, detailed design, ICDs, FW manual)
15 T4.7 ADC input and timestamp (RCU2 interface, capture timestamped data for offline analysis)
10 T4.8 Subband filterbank (Fsub, critically sampled, SST)
20 T4.9 Subband correlator (XC, one subband per 1 s integration)
10 T4.10 Beamformer (BF, BST, beamlet output to CEP)
2) UniBoard2 board and test firmware
- unb2c board HW
D=> unb2c board detailed design document
D=> unb2c board schematic
D=> unb2c board layout
10 + 10 + ? + 20 + 10 + 20 + 20 + 15 + 10 + 20 + 10 = 145 + ? weeks
M=> unb2c board detailed design document review (unb2b modifications)
M=> unb2c board schematic review
M=> unb2c board layout review (production ready)
M=> unb2c board lab validation using JTAG, unb2c_test designs OK
M=> unb2c board production validation using JTAG, unb2c_minimal_gmi OK
Milestone : SDP ready for CDR:
All major technical UniBoard2 hardware and SDP firmware risks are mitigated:
5 - unb2c FPGA pinning design
10 - unb2c FPGA interface test designs
D=> unb2c_test design revisions (1GbE, 10GbE, DDR4, flash, ADC)
D=> unb2c_test_adc (read ADC samples from multiple inputs)
20 3) UniBoard2 board support package (BSP)
- M&C by SCU via Gemini protocol
- M&C interface definition and generation using ARGS (doc, C, HDL)
D=> Gemini board for SCU M&C tests
D=> unb2c_minimal_gmi (1GbE, flash)
M=> unb2c_minimal_gmi validated using M&C by SCU (read design name)
INFRASTRUCTURE SDP:
10 4) Network access via 10GbE
- Ethernet MAC, UDP/IPv4, ARP, ping
D=> 10GbE HDL component including support for UDP/IPv4, ARP, ping
D=> unb2c_10GbE
M=> unb2c_10GbE validated using data capture on PC and ping
20 5) Ring access using test data and BSN monitor
D=> unb2c_ring_combiner for BF
D=> unb2c_ring_multicast for XC
D=> unb2c_ring_endcast for SO, TB
M=> unb2c_ring revisions verified in simulation
M=> unb2c_ring revisions validated on hardware using M&C on SCU
APPLICATION SDP documents:
6) Required documents
D=> Detailed design document of SDP firmware
D=> L1 ICD-11109 SDP-CEP: beamlet data protocol
D=> L1 ICD-11109 SDP-CEP: transient data protocol
D=> L2 ICD-11211 SC-SDP: FW register map and register definitions
D=> L2 ICD-11211 SC-SDP: UniBoard2 hardware M&C
D=> L2 ICD-11207 RCU2S-SDP: ADC interface
D=> L2 ICD-11209 STF-SDP: Time and frequency interface
D=> L2 ICD-11218 SDP-STCA: Subrack interface
M=> SDP detailed design and interface documents ready for DDR
M=> SDP detailed design and interface documents updated for CDR
D=> SDP firmware verification and maintenance document
M=> SDP all documents finished
APPLICATION single node:
weeks nr task
15 7) ADC input and timestamp (RCU2 interface)
==> unb2c_sdp_adc_capture, read ADC or WG samples from databuffer via M&C
==> unb2c_sdp_station (ADC)
M=> SDP ready for CDR
All major technical UniBoard2 hardware and SDP firmware risks are mitigated (by design and
based on validation with at least two UniBoard2 using JTAG, unb2c_minimal_gmi, unb2c_ring,
and unb2c_sdp_adc_capture).
10 8) Subband filterbank (Fsub)
==> unb2c_sdp_filterbank to read SST via M&C
==> unb2c_sdp_station (ADC + SST)
APPLICATION multi node:
weeks nr task
20 9) Subband correlator (XC)
==> unb2c_sdp_correlator_one_node, read XST via M&C and create ACM for one node
==> unb2c_sdp_correlator_multi_node, read XST via M&C and use ring to create complete ACM
==> unb2c_sdp_station (ADC + SST + XST)
APPLICATION multi node / network output:
weeks nr task
10 10) Beamformer (BF)
==> unb2c_sdp_beamformer_bst_one_node, read BST via M&C
==> unb2c_sdp_beamformer_output_one_input, output to CEP for one input from one node
==> unb2c_sdp_beamformer_output_one_node, output to CEP and sum one node
==> unb2c_sdp_beamformer_output_multi_node, output to CEP and use ring to sum nodes
==> unb2c_sdp_station (ADC + SST + XST + BST + BF output)
==> detailed design doc
25 11) Transient buffer (TB)
==> unb2c_sdp_transient_buffer revisions (ADC + SST + TB readout, M&C access DDR4)
==> unb2c_sdp_station (ADC + SST + XST + BST + BF output + TB readout)
==> detailed design doc
20 12) Transient detection (TD)
==> unb2c_sdp_transient_buffer revisions (ADC + TD event)
==> unb2c_sdp_station (ADC + SST + XST + BST + BF output + TB readout + TD event)
==> detailed design doc
20 13) Subband offload (SO) for AARTFAAC2.0
==> unb2c_sdp_subband_offload revisions (ADC + SST + SO, one node, all nodes via ring)
==> unb2c_sdp_station (ADC + SST + XST + BST + BF output + TB readout + TD event + SO)
==> detailed design doc
INTEGRATION:
weeks nr task
20 14) Station integration tests (using unb2c_sdp_station)
- Laboratory tests
- Technical commissioning Dwingeloo Test Station ("Huisje West")
- Technical commissioning Prototype Test Station
- Technical commissioning Pre-production Test Station
- by design
- SDP hardware and interfaces validated with at least two UniBoard2 using JTAG, firmware for BSP,
ring and ADC
- Station TD validated using BF beamlet output to CEP
The remaining tasks concern completing the applications that the firmware needs to perform.
weeks task description
25 T4.11 Transient buffer (TB, ADC data, subband data)
20 T4.12 Transient detection (TDET)
20 T4.13 Subband offload (SO) for AARTFAAC2.0
20 T4.14 Station integration tests (using unb2c_sdp_station)
25 + 20 + 20 + 20 = 85 weeks
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......@@ -227,6 +227,9 @@ Open issues:
- Write RadioHDL article
- Write HDL RL=0 article - desp_hdl_design_article.txt
- XST : SNR = 1 per visibility for 10000 samples, brigthtest sourcre log 19.5 --> 4.5 dB --> T_int = 1 s is ok.
- BSP registers:
. duration of operations : counts time since last power cycle (passive heartbeat)
. cause of reboot (power cycle, overtemperature, ...)
......
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