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RTSD
HDL
Commits
2d34da66
Commit
2d34da66
authored
8 years ago
by
Kenneth Hiemstra
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added missing REG_HEATER in sim
parent
89d6afee
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boards/uniboard2a/designs/unb2a_heater/doc/README.txt
+6
-4
6 additions, 4 deletions
boards/uniboard2a/designs/unb2a_heater/doc/README.txt
boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
+3
-0
3 additions, 0 deletions
...oard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
with
9 additions
and
4 deletions
boards/uniboard2a/designs/unb2a_heater/doc/README.txt
+
6
−
4
View file @
2d34da66
...
@@ -37,8 +37,8 @@ Modelsim instructions:
...
@@ -37,8 +37,8 @@ Modelsim instructions:
run 500us
run 500us
# while the simulation runs... in another bash session do:
# while the simulation runs... in another bash session do:
cd
unb2a_heater/tb/python
cd
python/peripherals
python
tc_unb2a
_heater.py --sim --unb 0 --fn 3 -
-seq INFO,PPSH,SENSORS
python
util
_heater.py --sim --unb 0 --fn 3 -
n1 # (n=0..6, to select number of heaters)
# (sensor results only show up after 1000us of simulation runtime)
# (sensor results only show up after 1000us of simulation runtime)
...
@@ -76,9 +76,11 @@ LCU computer.
...
@@ -76,9 +76,11 @@ LCU computer.
# (assume that the Uniboard is --unb 1)
# (assume that the Uniboard is --unb 1)
# To read out the design_name,
ppsh and senso
rs; do:
# To read out the design_name,
info; enable heate
rs; do:
python tc_unb2_heater.py --unb 1 --fn 0:3 --seq REGMAP,INFO,PPSH,SENSORS -v5
cd python/peripherals
python util_unb2.py --unb 1 --fn 0:3 --seq REGMAP,INFO -v5
python util_heater.py --sim --unb 1 --fn 0:3 -n1 # (n=0..6, to select number of heaters)
...
...
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boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
+
3
−
0
View file @
2d34da66
...
@@ -160,6 +160,9 @@ BEGIN
...
@@ -160,6 +160,9 @@ BEGIN
u_mm_file_reg_ppsh
:
mm_file
GENERIC
MAP
(
mmf_unb_file_prefix
(
g_sim_unb_nr
,
c_sim_node_nr
,
c_sim_node_type
)
&
"PIO_PPS"
)
u_mm_file_reg_ppsh
:
mm_file
GENERIC
MAP
(
mmf_unb_file_prefix
(
g_sim_unb_nr
,
c_sim_node_nr
,
c_sim_node_type
)
&
"PIO_PPS"
)
PORT
MAP
(
mm_rst
,
mm_clk
,
reg_ppsh_mosi
,
reg_ppsh_miso
);
PORT
MAP
(
mm_rst
,
mm_clk
,
reg_ppsh_mosi
,
reg_ppsh_miso
);
u_mm_file_reg_heater
:
mm_file
GENERIC
MAP
(
mmf_unb_file_prefix
(
g_sim_unb_nr
,
c_sim_node_nr
,
c_sim_node_type
)
&
"REG_HEATER"
)
PORT
MAP
(
mm_rst
,
mm_clk
,
reg_heater_mosi
,
reg_heater_miso
);
-- Note: the eth1g RAM and TSE buses are only required by unb_osy on the NIOS as they provide the ethernet<->MM gateway.
-- Note: the eth1g RAM and TSE buses are only required by unb_osy on the NIOS as they provide the ethernet<->MM gateway.
u_mm_file_reg_eth
:
mm_file
GENERIC
MAP
(
mmf_unb_file_prefix
(
g_sim_unb_nr
,
c_sim_node_nr
,
c_sim_node_type
)
&
"AVS_ETH_0_MMS_REG"
)
u_mm_file_reg_eth
:
mm_file
GENERIC
MAP
(
mmf_unb_file_prefix
(
g_sim_unb_nr
,
c_sim_node_nr
,
c_sim_node_type
)
&
"AVS_ETH_0_MMS_REG"
)
PORT
MAP
(
mm_rst
,
mm_clk
,
eth1g_reg_mosi
,
eth1g_reg_miso
);
PORT
MAP
(
mm_rst
,
mm_clk
,
eth1g_reg_mosi
,
eth1g_reg_miso
);
...
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