diff --git a/boards/uniboard2a/designs/unb2a_heater/doc/README.txt b/boards/uniboard2a/designs/unb2a_heater/doc/README.txt
index 7aa35f6725c80a7f7a96ffa5b3c2074fafa80b74..99553f4ac7a77fd324cfd13ef0dd778db0690c02 100644
--- a/boards/uniboard2a/designs/unb2a_heater/doc/README.txt
+++ b/boards/uniboard2a/designs/unb2a_heater/doc/README.txt
@@ -37,8 +37,8 @@ Modelsim instructions:
     run 500us
 
     # while the simulation runs... in another bash session do:
-    cd unb2a_heater/tb/python
-    python tc_unb2a_heater.py --sim --unb 0 --fn 3 --seq INFO,PPSH,SENSORS
+    cd python/peripherals
+    python util_heater.py --sim --unb 0 --fn 3 -n1  # (n=0..6, to select number of heaters)
 
     # (sensor results only show up after 1000us of simulation runtime)
 
@@ -76,9 +76,11 @@ LCU computer.
 
 # (assume that the Uniboard is --unb 1)
 
-# To read out the design_name, ppsh and sensors; do:
+# To read out the design_name, info; enable heaters; do:
 
-python tc_unb2_heater.py --unb 1 --fn 0:3 --seq REGMAP,INFO,PPSH,SENSORS -v5
+  cd python/peripherals
+  python util_unb2.py --unb 1 --fn 0:3 --seq REGMAP,INFO -v5
+  python util_heater.py --sim --unb 1 --fn 0:3 -n1  # (n=0..6, to select number of heaters)
 
 
 
diff --git a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
index a1236e69536597a38a65ce1a8af76ad8eaed9381..14c4b27bc7f8e9cdad156d3eff0003f2f4c95eb9 100644
--- a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
+++ b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd
@@ -160,6 +160,9 @@ BEGIN
     u_mm_file_reg_ppsh            : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "PIO_PPS")
                                                PORT MAP(mm_rst, mm_clk, reg_ppsh_mosi, reg_ppsh_miso );
 
+    u_mm_file_reg_heater          : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_HEATER")
+                                               PORT MAP(mm_rst, mm_clk, reg_heater_mosi, reg_heater_miso );
+
     -- Note: the eth1g RAM and TSE buses are only required by unb_osy on the NIOS as they provide the ethernet<->MM gateway.
     u_mm_file_reg_eth             : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "AVS_ETH_0_MMS_REG")
                                                PORT MAP(mm_rst, mm_clk, eth1g_reg_mosi, eth1g_reg_miso );