Skip to content
Snippets Groups Projects
Commit 2631e3dc authored by Reinier van der Walle's avatar Reinier van der Walle
Browse files

added bsn monitors to sdp_statistics_offload

parent 57a3042b
No related branches found
No related tags found
1 merge request!218Resolve L2SDP-492 + L2SDP-581
Pipeline #25715 passed
Showing
with 2049 additions and 1879 deletions
...@@ -234,7 +234,14 @@ peripherals: ...@@ -234,7 +234,14 @@ peripherals:
peripheral_group: sst peripheral_group: sst
mm_port_names: mm_port_names:
- REG_STAT_HDR_DAT_SST - REG_STAT_HDR_DAT_SST
- peripheral_name: dp/dp_bsn_monitor_v2
peripheral_group: sst_udp
parameter_overrides:
- { name: g_nof_streams, value: 1 }
mm_port_names:
- REG_BSN_MONITOR_V2_SST_OFFLOAD
############################################################################# #############################################################################
# Xsub = Subband Correlator (from node_sdp_correlator.vhd) # Xsub = Subband Correlator (from node_sdp_correlator.vhd)
############################################################################# #############################################################################
...@@ -416,5 +423,11 @@ peripherals: ...@@ -416,5 +423,11 @@ peripherals:
mm_port_names: mm_port_names:
- REG_NW_10GBE_ETH10G - REG_NW_10GBE_ETH10G
- peripheral_name: dp/dp_bsn_monitor_v2
peripheral_group: bst_udp
number_of_peripherals: c_N_beamsets
parameter_overrides:
- { name: g_nof_streams, value: 1 }
mm_port_names:
- REG_BSN_MONITOR_V2_BST_OFFLOAD
...@@ -234,7 +234,14 @@ peripherals: ...@@ -234,7 +234,14 @@ peripherals:
peripheral_group: sst peripheral_group: sst
mm_port_names: mm_port_names:
- REG_STAT_HDR_DAT_SST - REG_STAT_HDR_DAT_SST
- peripheral_name: dp/dp_bsn_monitor_v2
peripheral_group: sst_udp
parameter_overrides:
- { name: g_nof_streams, value: 1 }
mm_port_names:
- REG_BSN_MONITOR_V2_SST_OFFLOAD
############################################################################# #############################################################################
# Xsub = Subband Correlator (from node_sdp_correlator.vhd) # Xsub = Subband Correlator (from node_sdp_correlator.vhd)
############################################################################# #############################################################################
...@@ -416,5 +423,11 @@ peripherals: ...@@ -416,5 +423,11 @@ peripherals:
mm_port_names: mm_port_names:
- REG_NW_10GBE_ETH10G - REG_NW_10GBE_ETH10G
- peripheral_name: dp/dp_bsn_monitor_v2
peripheral_group: bst_udp
number_of_peripherals: c_N_beamsets
parameter_overrides:
- { name: g_nof_streams, value: 1 }
mm_port_names:
- REG_BSN_MONITOR_V2_BST_OFFLOAD
...@@ -73,6 +73,8 @@ ENTITY node_sdp_beamformer IS ...@@ -73,6 +73,8 @@ ENTITY node_sdp_beamformer IS
reg_stat_enable_miso : OUT t_mem_miso; reg_stat_enable_miso : OUT t_mem_miso;
reg_stat_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst; reg_stat_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_stat_hdr_dat_miso : OUT t_mem_miso; reg_stat_hdr_dat_miso : OUT t_mem_miso;
reg_bsn_monitor_v2_bst_offload_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bst_offload_cipo : OUT t_mem_cipo;
sdp_info : IN t_sdp_info; sdp_info : IN t_sdp_info;
gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0); gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0);
...@@ -302,6 +304,9 @@ BEGIN ...@@ -302,6 +304,9 @@ BEGIN
reg_hdr_dat_mosi => reg_stat_hdr_dat_mosi, reg_hdr_dat_mosi => reg_stat_hdr_dat_mosi,
reg_hdr_dat_miso => reg_stat_hdr_dat_miso, reg_hdr_dat_miso => reg_stat_hdr_dat_miso,
reg_bsn_monitor_v2_offload_copi => reg_bsn_monitor_v2_bst_offload_copi,
reg_bsn_monitor_v2_offload_cipo => reg_bsn_monitor_v2_bst_offload_cipo,
in_sosi => bf_sum_sosi, in_sosi => bf_sum_sosi,
out_sosi => bst_udp_sosi, out_sosi => bst_udp_sosi,
out_siso => bst_udp_siso, out_siso => bst_udp_siso,
......
...@@ -75,8 +75,8 @@ ENTITY node_sdp_correlator IS ...@@ -75,8 +75,8 @@ ENTITY node_sdp_correlator IS
reg_bsn_monitor_v2_bsn_align_input_cipo : OUT t_mem_cipo; reg_bsn_monitor_v2_bsn_align_input_cipo : OUT t_mem_cipo;
reg_bsn_monitor_v2_bsn_align_output_copi : IN t_mem_copi := c_mem_copi_rst; reg_bsn_monitor_v2_bsn_align_output_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_bsn_align_output_cipo : OUT t_mem_cipo; reg_bsn_monitor_v2_bsn_align_output_cipo : OUT t_mem_cipo;
reg_xst_udp_monitor_copi : IN t_mem_copi := c_mem_copi_rst; reg_bsn_monitor_v2_xst_offload_copi : IN t_mem_copi := c_mem_copi_rst;
reg_xst_udp_monitor_cipo : OUT t_mem_cipo; reg_bsn_monitor_v2_xst_offload_cipo : OUT t_mem_cipo;
sdp_info : IN t_sdp_info; sdp_info : IN t_sdp_info;
ring_info : IN t_ring_info; ring_info : IN t_ring_info;
...@@ -457,6 +457,9 @@ BEGIN ...@@ -457,6 +457,9 @@ BEGIN
reg_hdr_dat_mosi => reg_stat_hdr_dat_copi, reg_hdr_dat_mosi => reg_stat_hdr_dat_copi,
reg_hdr_dat_miso => reg_stat_hdr_dat_cipo, reg_hdr_dat_miso => reg_stat_hdr_dat_cipo,
reg_bsn_monitor_v2_offload_copi => reg_bsn_monitor_v2_xst_offload_copi,
reg_bsn_monitor_v2_offload_cipo => reg_bsn_monitor_v2_xst_offload_cipo,
in_sosi => crosslets_sosi, in_sosi => crosslets_sosi,
out_sosi => mon_xst_udp_sosi_arr(0), out_sosi => mon_xst_udp_sosi_arr(0),
out_siso => xst_udp_siso, out_siso => xst_udp_siso,
...@@ -472,33 +475,4 @@ BEGIN ...@@ -472,33 +475,4 @@ BEGIN
crosslets_info => crosslets_info crosslets_info => crosslets_info
); );
---------------------------------------------------------------
-- BSN Monitor for XST UDP offload
---------------------------------------------------------------
u_bsn_mon_xst_udp : ENTITY dp_lib.mms_dp_bsn_monitor_v2
GENERIC MAP (
g_nof_streams => 1,
g_cross_clock_domain => TRUE,
g_sync_timeout => c_sdp_N_clk_per_sync,
g_bsn_w => c_dp_stream_bsn_w,
g_error_bi => 0,
g_cnt_sop_w => c_word_w,
g_cnt_valid_w => c_word_w,
g_cnt_latency_w => c_word_w
)
PORT MAP (
-- Memory-mapped clock domain
mm_rst => mm_rst,
mm_clk => mm_clk,
reg_mosi => reg_xst_udp_monitor_copi,
reg_miso => reg_xst_udp_monitor_cipo,
-- Streaming clock domain
dp_rst => dp_rst,
dp_clk => dp_clk,
ref_sync => crosslets_sosi.sync, -- using crosslets_sosi sync instead of xst_udp_sosi as it has no sync.
in_sosi_arr => mon_xst_udp_sosi_arr
);
END str; END str;
...@@ -82,6 +82,8 @@ ENTITY node_sdp_filterbank IS ...@@ -82,6 +82,8 @@ ENTITY node_sdp_filterbank IS
reg_enable_miso : OUT t_mem_miso; reg_enable_miso : OUT t_mem_miso;
reg_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst; reg_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_hdr_dat_miso : OUT t_mem_miso; reg_hdr_dat_miso : OUT t_mem_miso;
reg_bsn_monitor_v2_sst_offload_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_sst_offload_cipo : OUT t_mem_cipo;
sdp_info : IN t_sdp_info; sdp_info : IN t_sdp_info;
gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0); gn_id : IN STD_LOGIC_VECTOR(c_sdp_W_gn_id-1 DOWNTO 0);
...@@ -354,6 +356,9 @@ BEGIN ...@@ -354,6 +356,9 @@ BEGIN
reg_hdr_dat_mosi => reg_hdr_dat_mosi, reg_hdr_dat_mosi => reg_hdr_dat_mosi,
reg_hdr_dat_miso => reg_hdr_dat_miso, reg_hdr_dat_miso => reg_hdr_dat_miso,
reg_bsn_monitor_v2_offload_copi => reg_bsn_monitor_v2_sst_offload_copi,
reg_bsn_monitor_v2_offload_cipo => reg_bsn_monitor_v2_sst_offload_cipo,
in_sosi => dp_selector_out_sosi_arr(0), in_sosi => dp_selector_out_sosi_arr(0),
out_sosi => sst_udp_sosi, out_sosi => sst_udp_sosi,
out_siso => sst_udp_siso, out_siso => sst_udp_siso,
......
...@@ -394,6 +394,8 @@ PACKAGE sdp_pkg is ...@@ -394,6 +394,8 @@ PACKAGE sdp_pkg is
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- MM -- MM
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- BSN monitor V2 address width
CONSTANT c_sdp_reg_bsn_monitor_v2_addr_w : NATURAL := ceil_Log2(7);
-- 10GbE MM address widths -- 10GbE MM address widths
CONSTANT c_sdp_reg_bf_hdr_dat_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_cep_hdr_dat_addr_w; CONSTANT c_sdp_reg_bf_hdr_dat_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_cep_hdr_dat_addr_w;
...@@ -423,24 +425,26 @@ PACKAGE sdp_pkg is ...@@ -423,24 +425,26 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_reg_aduh_monitor_addr_w : NATURAL := ceil_log2(c_sdp_S_pn) + 2; CONSTANT c_sdp_reg_aduh_monitor_addr_w : NATURAL := ceil_log2(c_sdp_S_pn) + 2;
-- FSUB MM address widths -- FSUB MM address widths
CONSTANT c_sdp_ram_fil_coefs_addr_w : NATURAL := ceil_log2(c_sdp_N_fft * c_sdp_N_taps); CONSTANT c_sdp_ram_fil_coefs_addr_w : NATURAL := ceil_log2(c_sdp_N_fft * c_sdp_N_taps);
CONSTANT c_sdp_ram_st_sst_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb * c_sdp_N_sub * c_sdp_Q_fft * c_sdp_W_statistic_sz); CONSTANT c_sdp_ram_st_sst_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb * c_sdp_N_sub * c_sdp_Q_fft * c_sdp_W_statistic_sz);
CONSTANT c_sdp_reg_si_addr_w : NATURAL := 1; --enable/disable CONSTANT c_sdp_reg_si_addr_w : NATURAL := 1; --enable/disable
CONSTANT c_sdp_ram_equalizer_gains_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb*c_sdp_N_sub*c_sdp_Q_fft); CONSTANT c_sdp_ram_equalizer_gains_addr_w : NATURAL := ceil_log2(c_sdp_P_pfb*c_sdp_N_sub*c_sdp_Q_fft);
CONSTANT c_sdp_reg_dp_selector_addr_w : NATURAL := 1; --Select input 0 or 1. CONSTANT c_sdp_reg_dp_selector_addr_w : NATURAL := 1; --Select input 0 or 1.
CONSTANT c_sdp_reg_bsn_monitor_v2_sst_offload_addr_w : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
-- STAT UDP offload MM address widths -- STAT UDP offload MM address widths
CONSTANT c_sdp_reg_stat_enable_addr_w : NATURAL := 1; CONSTANT c_sdp_reg_stat_enable_addr_w : NATURAL := 1;
-- BF MM address widths -- BF MM address widths
CONSTANT c_sdp_reg_sdp_info_addr_w : NATURAL := 4; CONSTANT c_sdp_reg_sdp_info_addr_w : NATURAL := 4;
CONSTANT c_sdp_ram_ss_ss_wide_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); CONSTANT c_sdp_ram_ss_ss_wide_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft);
CONSTANT c_sdp_ram_bf_weights_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pol_bf * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft); CONSTANT c_sdp_ram_bf_weights_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_N_pol_bf * c_sdp_P_pfb * c_sdp_S_sub_bf * c_sdp_Q_fft);
CONSTANT c_sdp_reg_bf_scale_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1; CONSTANT c_sdp_reg_bf_scale_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
CONSTANT c_sdp_reg_dp_xonoff_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1; CONSTANT c_sdp_reg_dp_xonoff_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + 1;
CONSTANT c_sdp_ram_st_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_S_sub_bf * c_sdp_N_pol_bf * c_sdp_W_statistic_sz); CONSTANT c_sdp_ram_st_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + ceil_log2(c_sdp_S_sub_bf * c_sdp_N_pol_bf * c_sdp_W_statistic_sz);
CONSTANT c_sdp_reg_stat_enable_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_enable_addr_w; CONSTANT c_sdp_reg_stat_enable_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_enable_addr_w;
CONSTANT c_sdp_reg_stat_hdr_dat_bst_addr_w: NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_hdr_dat_addr_w; CONSTANT c_sdp_reg_stat_hdr_dat_bst_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_stat_hdr_dat_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_bst_offload_addr_w : NATURAL := ceil_log2(c_sdp_N_beamsets) + c_sdp_reg_bsn_monitor_v2_addr_w;
-- XSUB -- XSUB
CONSTANT c_sdp_crosslets_index_w : NATURAL := ceil_log2(c_sdp_N_sub); CONSTANT c_sdp_crosslets_index_w : NATURAL := ceil_log2(c_sdp_N_sub);
...@@ -467,25 +471,25 @@ PACKAGE sdp_pkg is ...@@ -467,25 +471,25 @@ PACKAGE sdp_pkg is
CONSTANT c_sdp_xst_nof_clk_per_sync_min : NATURAL := c_sdp_N_clk_per_sync / 10; -- 0.1 second CONSTANT c_sdp_xst_nof_clk_per_sync_min : NATURAL := c_sdp_N_clk_per_sync / 10; -- 0.1 second
-- XSUB MM address widths -- XSUB MM address widths
CONSTANT c_sdp_reg_crosslets_info_addr_w : NATURAL := c_sdp_mm_reg_crosslets_info.adr_w; CONSTANT c_sdp_reg_crosslets_info_addr_w : NATURAL := c_sdp_mm_reg_crosslets_info.adr_w;
CONSTANT c_sdp_reg_nof_crosslets_addr_w : NATURAL := c_sdp_mm_reg_nof_crosslets.adr_w; CONSTANT c_sdp_reg_nof_crosslets_addr_w : NATURAL := c_sdp_mm_reg_nof_crosslets.adr_w;
CONSTANT c_sdp_reg_bsn_sync_scheduler_xsub_addr_w : NATURAL := 4; CONSTANT c_sdp_reg_bsn_sync_scheduler_xsub_addr_w : NATURAL := 4;
CONSTANT c_sdp_ram_st_xsq_addr_w : NATURAL := ceil_log2(c_sdp_N_crosslets_max * c_sdp_X_sq * c_nof_complex * c_sdp_W_statistic_sz); CONSTANT c_sdp_ram_st_xsq_addr_w : NATURAL := ceil_log2(c_sdp_N_crosslets_max * c_sdp_X_sq * c_nof_complex * c_sdp_W_statistic_sz);
CONSTANT c_sdp_ram_st_xsq_arr_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_ram_st_xsq_addr_w; CONSTANT c_sdp_ram_st_xsq_arr_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_ram_st_xsq_addr_w;
CONSTANT c_sdp_reg_bsn_align_v2_addr_w : NATURAL := ceil_log2(2*c_sdp_P_sq); CONSTANT c_sdp_reg_bsn_align_v2_addr_w : NATURAL := ceil_log2(2*c_sdp_P_sq);
CONSTANT c_sdp_reg_bsn_monitor_v2_bsn_align_v2_input_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_bsn_align_v2_input_addr_w : NATURAL := ceil_log2(c_sdp_P_sq) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_bsn_align_v2_output_addr_w : NATURAL := ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_bsn_align_v2_output_addr_w : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_xst_offload_addr_w : NATURAL := ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_xst_offload_addr_w : NATURAL := c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_ring_lane_info_xst_addr_w : NATURAL := 1; CONSTANT c_sdp_reg_ring_lane_info_xst_addr_w : NATURAL := 1;
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_xst_addr_w : NATURAL := ceil_log2(c_sdp_N_pn_max) + ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_xst_addr_w : NATURAL := ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_tx_xst_addr_w : NATURAL := ceil_log2(c_sdp_N_pn_max) + ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_ring_tx_xst_addr_w : NATURAL := ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_dp_block_validate_err_xst_addr_w : NATURAL := 4; CONSTANT c_sdp_reg_dp_block_validate_err_xst_addr_w : NATURAL := 4;
CONSTANT c_sdp_reg_dp_block_validate_bsn_at_sync_xst_addr_w : NATURAL := 2; CONSTANT c_sdp_reg_dp_block_validate_bsn_at_sync_xst_addr_w : NATURAL := 2;
-- RING MM address widths -- RING MM address widths
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + ceil_log2(c_sdp_N_pn_max) + ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_ring_rx_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_bsn_monitor_v2_ring_tx_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + ceil_log2(c_sdp_N_pn_max) + ceil_Log2(7); CONSTANT c_sdp_reg_bsn_monitor_v2_ring_tx_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + ceil_log2(c_sdp_N_pn_max) + c_sdp_reg_bsn_monitor_v2_addr_w;
CONSTANT c_sdp_reg_ring_lane_info_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1; CONSTANT c_sdp_reg_ring_lane_info_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1;
CONSTANT c_sdp_reg_dp_xonoff_lane_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1; CONSTANT c_sdp_reg_dp_xonoff_lane_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1;
CONSTANT c_sdp_reg_dp_xonoff_local_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1; CONSTANT c_sdp_reg_dp_xonoff_local_addr_w : NATURAL := ceil_log2(c_sdp_N_ring_lanes_max) + 1;
......
This diff is collapsed.
...@@ -122,6 +122,10 @@ ENTITY sdp_statistics_offload IS ...@@ -122,6 +122,10 @@ ENTITY sdp_statistics_offload IS
reg_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst; reg_hdr_dat_mosi : IN t_mem_mosi := c_mem_mosi_rst;
reg_hdr_dat_miso : OUT t_mem_miso; reg_hdr_dat_miso : OUT t_mem_miso;
-- Memory access bsn monitor udp offload
reg_bsn_monitor_v2_offload_copi : IN t_mem_copi := c_mem_copi_rst;
reg_bsn_monitor_v2_offload_cipo : OUT t_mem_cipo;
-- Input timing regarding the integration interval of the statistics -- Input timing regarding the integration interval of the statistics
in_sosi : IN t_dp_sosi; in_sosi : IN t_dp_sosi;
...@@ -212,6 +216,8 @@ ARCHITECTURE str OF sdp_statistics_offload IS ...@@ -212,6 +216,8 @@ ARCHITECTURE str OF sdp_statistics_offload IS
SIGNAL dp_offload_snk_in : t_dp_sosi; SIGNAL dp_offload_snk_in : t_dp_sosi;
SIGNAL dp_offload_snk_out : t_dp_siso; SIGNAL dp_offload_snk_out : t_dp_siso;
SIGNAL udp_sosi : t_dp_sosi;
SIGNAL bsn_at_sync : STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0'); SIGNAL bsn_at_sync : STD_LOGIC_VECTOR(63 DOWNTO 0) := (OTHERS => '0');
SIGNAL dp_header_info : STD_LOGIC_VECTOR(1023 DOWNTO 0):= (OTHERS => '0'); SIGNAL dp_header_info : STD_LOGIC_VECTOR(1023 DOWNTO 0):= (OTHERS => '0');
...@@ -491,8 +497,40 @@ BEGIN ...@@ -491,8 +497,40 @@ BEGIN
reg_hdr_dat_miso => reg_hdr_dat_miso, reg_hdr_dat_miso => reg_hdr_dat_miso,
snk_in_arr(0) => dp_offload_snk_in, snk_in_arr(0) => dp_offload_snk_in,
snk_out_arr(0) => dp_offload_snk_out, snk_out_arr(0) => dp_offload_snk_out,
src_out_arr(0) => out_sosi, src_out_arr(0) => udp_sosi,
src_in_arr(0) => out_siso, src_in_arr(0) => out_siso,
hdr_fields_in_arr(0) => r.dp_header_info hdr_fields_in_arr(0) => r.dp_header_info
); );
out_sosi <= udp_sosi;
u_bsn_mon_udp : ENTITY dp_lib.mms_dp_bsn_monitor_v2
GENERIC MAP (
g_nof_streams => 1,
g_cross_clock_domain => TRUE,
g_sync_timeout => c_sdp_N_clk_per_sync,
g_bsn_w => c_dp_stream_bsn_w,
g_error_bi => 0,
g_cnt_sop_w => c_word_w,
g_cnt_valid_w => c_word_w,
g_cnt_latency_w => c_word_w
)
PORT MAP (
-- Memory-mapped clock domain
mm_rst => mm_rst,
mm_clk => mm_clk,
reg_mosi => reg_bsn_monitor_v2_offload_copi,
reg_miso => reg_bsn_monitor_v2_offload_cipo,
-- Streaming clock domain
dp_rst => dp_rst,
dp_clk => dp_clk,
ref_sync => in_sosi.sync, -- using in_sosi sync instead of udp_sosi as it has no sync.
in_sosi_arr(0) => udp_sosi
);
END str; END str;
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment