Added array types

libraries/technology/ddr/tech_ddr_pkg.vhd

@@ -131,6 +131,14 @@ PACKAGE tech_ddr_pkg IS
     odt                        : STD_LOGIC_VECTOR(c_tech_ddr4_max.odt_w-1 DOWNTO 0);                -- on-die termination control signal
   END RECORD;
   
+  TYPE t_tech_ddr3_phy_in_arr IS ARRAY(NATURAL RANGE <>) OF t_tech_ddr3_phy_in;
+  TYPE t_tech_ddr3_phy_io_arr IS ARRAY(NATURAL RANGE <>) OF t_tech_ddr3_phy_io; 
+  TYPE t_tech_ddr3_phy_ou_arr IS ARRAY(NATURAL RANGE <>) OF t_tech_ddr3_phy_ou;
+
+  TYPE t_tech_ddr4_phy_in_arr IS ARRAY(NATURAL RANGE <>) OF t_tech_ddr4_phy_in;
+  TYPE t_tech_ddr4_phy_io_arr IS ARRAY(NATURAL RANGE <>) OF t_tech_ddr4_phy_io; 
+  TYPE t_tech_ddr4_phy_ou_arr IS ARRAY(NATURAL RANGE <>) OF t_tech_ddr4_phy_ou;
+  
   TYPE t_tech_ddr3_phy_terminationcontrol IS RECORD                                                 -- DDR3 Termination control
     seriesterminationcontrol   : STD_LOGIC_VECTOR(c_tech_ddr3_max.terminationcontrol_w-1 DOWNTO 0); -- termination control from master to slave DDR3 PHY (internal signal in FPGA)
     parallelterminationcontrol : STD_LOGIC_VECTOR(c_tech_ddr3_max.terminationcontrol_w-1 DOWNTO 0); -- termination control from master to slave DDR3 PHY (internal signal in FPGA)