Adjusted path /home/kooistra/svnroot/UniBoard_FP7/RadioHDL/trunk/build/quartus...

Adjusted path /home/kooistra/svnroot/UniBoard_FP7/RadioHDL/trunk/build/quartus to include toolset subsir /home/kooistra/svnroot/UniBoard_FP7/RadioHDL/trunk/build/unb1/quartus/

boards/uniboard1/designs/unb1_ddr3/hdllib.cfg

@@ -6,7 +6,7 @@ hdl_lib_technology = ip_stratixiv
 hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_ddr3/sopc_unb1_ddr3.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3/sopc_unb1_ddr3.vhd
     src/vhdl/node_unb1_ddr3.vhd
     src/vhdl/mmm_unb1_ddr3.vhd
     src/vhdl/unb1_ddr3.vhd
@@ -30,7 +30,7 @@ quartus_vhdl_files =
 
 quartus_qip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
-    $HDL_BUILD_DIR/quartus/unb1_ddr3/sopc_unb1_ddr3.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3/sopc_unb1_ddr3.qip
 
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl

boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg

@@ -7,7 +7,7 @@ hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
 hdl_lib_technology = ip_stratixiv
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.vhd
     src/vhdl/mmm_unb1_ddr3_transpose.vhd
     src/vhdl/unb1_ddr3_transpose.vhd
     
@@ -29,7 +29,7 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
 
 modelsim_compile_ip_files =

boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg

@@ -6,7 +6,7 @@ hdl_lib_technology = ip_stratixiv
 synth_top_level_entity =
 
 synth_files =   
-    $HDL_BUILD_DIR/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.vhd
     src/vhdl/mmm_unb1_fn_terminal_db.vhd
     src/vhdl/unb1_fn_terminal_db.vhd
     
@@ -24,5 +24,5 @@ quartus_tcl_files =
     quartus/unb1_fn_terminal_db_pins.tcl
     
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.qip
 

boards/uniboard1/designs/unb1_minimal/hdllib.cfg

@@ -6,7 +6,7 @@ hdl_lib_uses_sim =
 hdl_lib_technology = ip_stratixiv
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_minimal_sopc/sopc_unb1_minimal.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_minimal_sopc/sopc_unb1_minimal.vhd
     src/vhdl/qsys_unb1_minimal_pkg.vhd
     src/vhdl/mmm_unb1_minimal.vhd
     src/vhdl/unb1_minimal.vhd

boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg

@@ -25,5 +25,5 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_minimal_qsys/qsys_unb1_minimal/synthesis/qsys_unb1_minimal.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_minimal_qsys/qsys_unb1_minimal/synthesis/qsys_unb1_minimal.qip
 

boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg

@@ -25,5 +25,5 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_minimal_sopc/sopc_unb1_minimal.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_minimal_sopc/sopc_unb1_minimal.qip
 

boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg

@@ -6,7 +6,7 @@ hdl_lib_uses_sim =
 hdl_lib_technology = ip_stratixiv
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_tr_10GbE/sopc_tr_10GbE.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_tr_10GbE/sopc_tr_10GbE.vhd
     src/vhdl/node_unb1_tr_10GbE.vhd
     src/vhdl/unb1_tr_10GbE.vhd
     
@@ -25,5 +25,5 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_tr_10GbE/sopc_tr_10GbE.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_tr_10GbE/sopc_tr_10GbE.qip