From 1e4fb8a91f8b32f4cbc123c13793f887086ab423 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Tue, 28 Apr 2015 05:58:33 +0000
Subject: [PATCH] Adjusted path
 /home/kooistra/svnroot/UniBoard_FP7/RadioHDL/trunk/build/quartus to include
 toolset subsir
 /home/kooistra/svnroot/UniBoard_FP7/RadioHDL/trunk/build/unb1/quartus/

---
 boards/uniboard1/designs/unb1_ddr3/hdllib.cfg                 | 4 ++--
 boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg       | 4 ++--
 boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg       | 4 ++--
 boards/uniboard1/designs/unb1_minimal/hdllib.cfg              | 2 +-
 .../unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg       | 2 +-
 .../unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg       | 2 +-
 boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg             | 4 ++--
 7 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
index 6bc4859c10..5a0b7fed47 100644
--- a/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3/hdllib.cfg
@@ -6,7 +6,7 @@ hdl_lib_technology = ip_stratixiv
 hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_ddr3/sopc_unb1_ddr3.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3/sopc_unb1_ddr3.vhd
     src/vhdl/node_unb1_ddr3.vhd
     src/vhdl/mmm_unb1_ddr3.vhd
     src/vhdl/unb1_ddr3.vhd
@@ -30,7 +30,7 @@ quartus_vhdl_files =
 
 quartus_qip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
-    $HDL_BUILD_DIR/quartus/unb1_ddr3/sopc_unb1_ddr3.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3/sopc_unb1_ddr3.qip
 
 modelsim_compile_ip_files =
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
diff --git a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
index dea60a4a96..75e963d7fd 100644
--- a/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_ddr3_transpose/hdllib.cfg
@@ -7,7 +7,7 @@ hdl_lib_excludes = ip_stratixiv_ddr3_uphy_4g_800_slave
 hdl_lib_technology = ip_stratixiv
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.vhd
     src/vhdl/mmm_unb1_ddr3_transpose.vhd
     src/vhdl/unb1_ddr3_transpose.vhd
     
@@ -29,7 +29,7 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_ddr3_transpose/sopc_unb_ddr3_transpose.qip
     $RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master.qip
 
 modelsim_compile_ip_files =
diff --git a/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg b/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
index 49ec32ae24..2addfe9782 100644
--- a/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_fn_terminal_db/hdllib.cfg
@@ -6,7 +6,7 @@ hdl_lib_technology = ip_stratixiv
 synth_top_level_entity =
 
 synth_files =   
-    $HDL_BUILD_DIR/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.vhd
     src/vhdl/mmm_unb1_fn_terminal_db.vhd
     src/vhdl/unb1_fn_terminal_db.vhd
     
@@ -24,5 +24,5 @@ quartus_tcl_files =
     quartus/unb1_fn_terminal_db_pins.tcl
     
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_fn_terminal_db/sopc_unb1_fn_terminal_db.qip
 
diff --git a/boards/uniboard1/designs/unb1_minimal/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/hdllib.cfg
index 38ec2880a8..503fcc0212 100644
--- a/boards/uniboard1/designs/unb1_minimal/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/hdllib.cfg
@@ -6,7 +6,7 @@ hdl_lib_uses_sim =
 hdl_lib_technology = ip_stratixiv
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_minimal_sopc/sopc_unb1_minimal.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_minimal_sopc/sopc_unb1_minimal.vhd
     src/vhdl/qsys_unb1_minimal_pkg.vhd
     src/vhdl/mmm_unb1_minimal.vhd
     src/vhdl/unb1_minimal.vhd
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg
index 04ce47b999..f0f983db6d 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_qsys/hdllib.cfg
@@ -25,5 +25,5 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_minimal_qsys/qsys_unb1_minimal/synthesis/qsys_unb1_minimal.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_minimal_qsys/qsys_unb1_minimal/synthesis/qsys_unb1_minimal.qip
 
diff --git a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg
index 7506bc963e..0ab784a66e 100644
--- a/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_minimal/revisions/unb1_minimal_sopc/hdllib.cfg
@@ -25,5 +25,5 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_minimal_sopc/sopc_unb1_minimal.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_minimal_sopc/sopc_unb1_minimal.qip
 
diff --git a/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg b/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
index 96f39d0fdf..4077e33513 100644
--- a/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_tr_10GbE/hdllib.cfg
@@ -6,7 +6,7 @@ hdl_lib_uses_sim =
 hdl_lib_technology = ip_stratixiv
 
 synth_files =
-    $HDL_BUILD_DIR/quartus/unb1_tr_10GbE/sopc_tr_10GbE.vhd
+    $HDL_BUILD_DIR/unb1/quartus/unb1_tr_10GbE/sopc_tr_10GbE.vhd
     src/vhdl/node_unb1_tr_10GbE.vhd
     src/vhdl/unb1_tr_10GbE.vhd
     
@@ -25,5 +25,5 @@ quartus_tcl_files =
 quartus_vhdl_files = 
 
 quartus_qip_files =
-    $HDL_BUILD_DIR/quartus/unb1_tr_10GbE/sopc_tr_10GbE.qip
+    $HDL_BUILD_DIR/unb1/quartus/unb1_tr_10GbE/sopc_tr_10GbE.qip
 
-- 
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