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Commit 17825aec authored by Reinier van der Walle's avatar Reinier van der Walle
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1 merge request!302added tb for disturb design
Pipeline #42374 passed
This commit is part of merge request !302. Comments created here will be created in the context of that merge request.
......@@ -6,7 +6,6 @@ hdl_lib_technology = ip_arria10_e1sg
synth_files =
disturb2_unb2b_sdp_station_full_wg.vhd
tb_disturb2_unb2b_sdp_station_full_wg.vhd
test_bench_files =
tb_disturb2_unb2b_sdp_station_full_wg.vhd
......
-------------------------------------------------------------------------------
--
-- Copyright 2020
-- Copyright 2023
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
......@@ -44,7 +44,7 @@
-- > as 7 # default
-- > as 12 # for detailed debugging
-- > run -a
--
-- Remark: TB based on tb_lofar2_unb2b_beamformer.vhd
-------------------------------------------------------------------------------
LIBRARY IEEE, common_lib, unb2b_board_lib, i2c_lib, mm_lib, dp_lib, diag_lib, lofar2_sdp_lib, wpfb_lib, tech_pll_lib, tr_10GbE_lib;
USE IEEE.std_logic_1164.ALL;
......@@ -88,44 +88,26 @@ ARCHITECTURE tb OF tb_disturb2_unb2b_sdp_station_full_wg IS
CONSTANT c_wpfb_sim : t_wpfb := func_wpfb_set_nof_block_per_sync(c_sdp_wpfb_subbands, c_nof_block_per_sync);
CONSTANT c_wpfb_complex_sim : t_wpfb := func_wpfb_map_real_input_wpfb_parameters_to_complex_input(c_wpfb_sim);
CONSTANT c_percentage : REAL := 0.05; -- percentage that actual value may differ from expected value
CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary
CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary
-- WG
CONSTANT c_full_scale_ampl : REAL := REAL(2**(14-1)-1); -- = full scale of WG
CONSTANT c_full_scale_ampl : REAL := REAL(2**(c_sdp_W_adc-1)-1); -- = full scale of WG
CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values
CONSTANT c_ampl_sp_0 : NATURAL := 2**(c_sdp_W_adc-1) / 2; -- in number of lsb
CONSTANT c_ampl_sp : NATURAL := 2**(c_sdp_W_adc-1) / 2; -- in number of lsb
CONSTANT c_wg_subband_freq_unit : REAL := c_diag_wg_freq_unit/REAL(c_sdp_N_fft); -- subband freq = Fs/1024 = 200 MSps/1024 = 195312.5 Hz sinus
CONSTANT c_wg_freq_offset : REAL := 0.0/11.0; -- in freq_unit
CONSTANT c_subband_sp_0 : REAL := 102.0; -- Select subband at index 102 = 102/1024 * 200MHz = 19.921875 MHz
CONSTANT c_subband_sp_1 : REAL := 99.5; -- Select subband at index 99.5 = 99.5/1024 * 200MHz = 19.43359375 MHz
CONSTANT c_wg_ampl_lsb : REAL := c_diag_wg_ampl_unit / c_full_scale_ampl; -- amplitude in number of LSbit resolution steps
CONSTANT c_exp_wg_power_sp_0 : REAL := REAL(c_ampl_sp_0**2)/2.0 * REAL(c_sdp_N_fft*c_nof_block_per_sync);
-- WPFB
CONSTANT c_wb_leakage_bin : NATURAL := c_wpfb_sim.nof_points / c_wpfb_sim.wb_factor; -- = 256, leakage will occur in this bin if FIR wb_factor is reversed
CONSTANT c_exp_sp_beamlet_power_ratio : REAL := 1.0/8.0; -- depends on internal WPFB quantization and FIR coefficients
CONSTANT c_exp_sp_beamlet_power_sum_ratio : REAL := c_exp_sp_beamlet_power_ratio; -- because all sinus power is expected in one subband
CONSTANT c_exp_beamlet_power_sp_0 : REAL := c_exp_wg_power_sp_0 * c_exp_sp_beamlet_power_ratio;
CONSTANT c_exp_wg_power_sp : REAL := REAL(c_ampl_sp**2)/2.0 * REAL(c_sdp_N_fft*c_nof_block_per_sync);
TYPE t_real_arr IS ARRAY (INTEGER RANGE <>) OF REAL;
TyPE t_slv_64_subbands_arr IS ARRAY (INTEGER RANGE <>) OF t_slv_64_arr(0 TO c_sdp_S_sub_bf);
-- ADUH
CONSTANT c_mon_buffer_nof_samples : NATURAL := 512; --samples per stream
CONSTANT c_mon_buffer_nof_words : NATURAL := c_mon_buffer_nof_samples;
-- MM
CONSTANT c_mm_file_reg_ppsh : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "PIO_PPS";
CONSTANT c_mm_file_reg_bsn_source_v2 : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_BSN_SOURCE_V2";
CONSTANT c_mm_file_reg_bsn_scheduler_wg : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_BSN_SCHEDULER";
CONSTANT c_mm_file_reg_diag_wg : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_WG";
CONSTANT c_mm_file_reg_aduh_mon : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_ADUH_MONITOR";
CONSTANT c_mm_file_ram_aduh_mon : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "RAM_ADUH_MONITOR";
CONSTANT c_mm_file_ram_st_bst : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "RAM_ST_BST";
CONSTANT c_mm_file_reg_dp_xonoff : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "REG_DP_XONOFF";
CONSTANT c_mm_file_ram_st_sst : STRING := mmf_unb_file_prefix(c_unb_nr, c_node_nr) & "RAM_ST_SST";
-- Tb
SIGNAL tb_end : STD_LOGIC := '0';
......@@ -134,23 +116,9 @@ ARCHITECTURE tb OF tb_disturb2_unb2b_sdp_station_full_wg IS
SIGNAL rd_data : STD_LOGIC_VECTOR(c_32-1 DOWNTO 0);
-- WG
SIGNAL dbg_c_exp_wg_power_sp_0 : REAL := c_exp_wg_power_sp_0;
SIGNAL sp_samples : t_integer_arr(0 TO c_mon_buffer_nof_samples-1) := (OTHERS=>0);
SIGNAL sp_sample : INTEGER := 0;
SIGNAL sp_power_sum : STD_LOGIC_VECTOR(63 DOWNTO 0);
SIGNAL dbg_c_exp_wg_power_sp : REAL := c_exp_wg_power_sp;
SIGNAL current_bsn_wg : STD_LOGIC_VECTOR(c_dp_stream_bsn_w-1 DOWNTO 0);
-- WPFB
SIGNAL sp_subband_powers_arr2 : t_slv_64_subbands_arr(c_sdp_N_beamsets*c_sdp_N_pol-1 DOWNTO 0); -- [sp][sub]
SIGNAL sp_beamlet_powers_arr2 : t_slv_64_subbands_arr(c_sdp_N_beamsets*c_sdp_N_pol-1 DOWNTO 0); -- [sp][sub]
SIGNAL sp_beamlet_power_0 : REAL;
SIGNAL sp_beamlet_power_sum : t_real_arr(c_sdp_N_beamsets*c_sdp_N_pol-1 DOWNTO 0) := (OTHERS=>0.0);
SIGNAL sp_beamlet_power_sum_0 : REAL;
SIGNAL sp_beamlet_power_ratio_0 : REAL;
SIGNAL sp_beamlet_power_sum_ratio_0 : REAL;
SIGNAL sp_beamlet_power_leakage_sum_0 : REAL;
-- 10GbE
CONSTANT c_exp_beamlet_index : NATURAL := NATURAL(c_subband_sp_0) * c_sdp_N_pol;
CONSTANT c_exp_beamlet_index_os : NATURAL := c_sdp_N_pol_bf * c_sdp_cep_nof_beamlets_per_block + NATURAL(ROUND(c_subband_sp_1)) * c_sdp_N_pol;
......@@ -189,8 +157,6 @@ ARCHITECTURE tb OF tb_disturb2_unb2b_sdp_station_full_wg IS
SIGNAL SA_CLK : STD_LOGIC := '1';
SIGNAL si_lpbk_0 : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0);
BEGIN
----------------------------------------------------------------------------
......@@ -299,10 +265,8 @@ BEGIN
serial_rx_arr(0) => si_lpbk_0(0),
src_out_arr(0) => tr_10GbE_src_out
);
------------------------------------------------------------------------------
-- MM slave accesses via file IO
------------------------------------------------------------------------------
......@@ -310,10 +274,6 @@ BEGIN
p_mm_stimuli : PROCESS
VARIABLE v_bsn : NATURAL;
VARIABLE v_sp_power_sum_0 : REAL;
VARIABLE v_sp_beamlet_power : REAL;
VARIABLE v_sp_subband_power : REAL;
VARIABLE v_W, v_T, v_U, v_S, v_B : NATURAL; -- array indicies
VARIABLE v_beamlet_index_offset : NATURAL;
BEGIN
-- Wait for DUT power up after reset
......@@ -321,7 +281,6 @@ BEGIN
proc_common_wait_until_hi_lo(ext_clk, ext_pps);
----------------------------------------------------------------------------
-- Enable UDP offload (dp_xonoff) of beamset 0
----------------------------------------------------------------------------
......@@ -347,11 +306,11 @@ BEGIN
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 0, 1024*2**16 + 1, tb_clk); -- nof_samples, mode calc
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 1, INTEGER( 0.0 * c_diag_wg_phase_unit), tb_clk); -- phase offset in degrees
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 2, INTEGER((c_subband_sp_0+c_wg_freq_offset) * c_wg_subband_freq_unit), tb_clk); -- freq
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 3, INTEGER(REAL(c_ampl_sp_0) * c_wg_ampl_lsb), tb_clk); -- ampl
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 3, INTEGER(REAL(c_ampl_sp) * c_wg_ampl_lsb), tb_clk); -- ampl
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 8, 1024*2**16 + 1, tb_clk); -- nof_samples, mode calc
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 9, INTEGER( 0.0 * c_diag_wg_phase_unit), tb_clk); -- phase offset in degrees
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 10, INTEGER((c_subband_sp_1+c_wg_freq_offset) * c_wg_subband_freq_unit), tb_clk); -- freq
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 11, INTEGER(REAL(c_ampl_sp_0) * c_wg_ampl_lsb), tb_clk); -- ampl
mmf_mm_bus_wr(c_mm_file_reg_diag_wg, 11, INTEGER(REAL(c_ampl_sp) * c_wg_ampl_lsb), tb_clk); -- ampl
-- Read current BSN
mmf_mm_bus_rd(c_mm_file_reg_bsn_scheduler_wg, 0, current_bsn_wg(31 DOWNTO 0), tb_clk);
......@@ -373,7 +332,7 @@ BEGIN
---------------------------------------------------------------------------
-- Read 10GbE Stream
---------------------------------------------------------------------------
FOR BS IN 0 TO 2 LOOP -- Read 1 block from both beamsets.
FOR BS IN 0 TO 2 LOOP -- Read 3 blocks to make sure we get 1 from each beamset. It can happen that two blocks (but not three) from the same beamset are received back to back.
proc_common_wait_until_high(ext_clk, tr_10GbE_src_out.sop);
FOR I IN 0 TO 8 LOOP -- Packet header is 9.25 words wide, which can be discarded
IF I = 7 THEN
......@@ -426,5 +385,4 @@ BEGIN
proc_common_stop_simulation(TRUE, ext_clk, sim_done, tb_end);
WAIT;
END PROCESS;
END tb;
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