added tb for disturb design
12 unresolved threads
12 unresolved threads
Closes DIST2-8
Merge request reports
Activity
requested review from @kooistra
assigned to @walle
4 4 hdl_lib_uses_sim = eth 5 5 hdl_lib_technology = ip_arria10_e1sg 6 6 7 synth_files = 7 synth_files = 8 8 disturb2_unb2b_sdp_station_full_wg.vhd 9 tb_disturb2_unb2b_sdp_station_full_wg.vhd changed this line in version 2 of the diff
361 -- Write scheduler BSN to trigger start of WG at next block 362 v_bsn := TO_UINT(current_bsn_wg) + 2; 363 ASSERT v_bsn <= c_bsn_start_wg REPORT "Too late to start WG: " & int_to_str(v_bsn) & " > " & int_to_str(c_bsn_start_wg) SEVERITY ERROR; 364 v_bsn := c_bsn_start_wg; 365 mmf_mm_bus_wr(c_mm_file_reg_bsn_scheduler_wg, 0, v_bsn, tb_clk); -- first write low then high part 366 mmf_mm_bus_wr(c_mm_file_reg_bsn_scheduler_wg, 1, 0, tb_clk); -- assume v_bsn < 2**31-1 367 368 -- Wait for enough WG data and start of sync interval 369 mmf_mm_wait_until_value(c_mm_file_reg_bsn_scheduler_wg, 0, -- read BSN low 370 "UNSIGNED", rd_data, ">=", c_nof_block_per_sync*2, -- this is the wait until condition 371 c_sdp_T_sub, tb_clk); 372 373 --------------------------------------------------------------------------- 374 -- Read 10GbE Stream 375 --------------------------------------------------------------------------- 376 FOR BS IN 0 TO 2 LOOP -- Read 1 block from both beamsets. changed this line in version 2 of the diff
81 CONSTANT c_pps_period : NATURAL := 1000; 82 83 CONSTANT c_tb_clk_period : TIME := 100 ps; -- use fast tb_clk to speed up M&C 84 CONSTANT c_cable_delay : TIME := 12 ns; 85 86 CONSTANT c_nof_block_per_sync : NATURAL := 16; 87 CONSTANT c_nof_clk_per_sync : NATURAL := c_nof_block_per_sync*c_sdp_N_fft; 88 CONSTANT c_wpfb_sim : t_wpfb := func_wpfb_set_nof_block_per_sync(c_sdp_wpfb_subbands, c_nof_block_per_sync); 89 CONSTANT c_wpfb_complex_sim : t_wpfb := func_wpfb_map_real_input_wpfb_parameters_to_complex_input(c_wpfb_sim); 90 91 CONSTANT c_percentage : REAL := 0.05; -- percentage that actual value may differ from expected value 92 CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary 93 CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary 94 95 -- WG 96 CONSTANT c_full_scale_ampl : REAL := REAL(2**(14-1)-1); -- = full scale of WG changed this line in version 2 of the diff
93 CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary 94 95 -- WG 96 CONSTANT c_full_scale_ampl : REAL := REAL(2**(14-1)-1); -- = full scale of WG 97 CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values 98 CONSTANT c_ampl_sp_0 : NATURAL := 2**(c_sdp_W_adc-1) / 2; -- in number of lsb 99 CONSTANT c_wg_subband_freq_unit : REAL := c_diag_wg_freq_unit/REAL(c_sdp_N_fft); -- subband freq = Fs/1024 = 200 MSps/1024 = 195312.5 Hz sinus 100 CONSTANT c_wg_freq_offset : REAL := 0.0/11.0; -- in freq_unit 101 CONSTANT c_subband_sp_0 : REAL := 102.0; -- Select subband at index 102 = 102/1024 * 200MHz = 19.921875 MHz 102 CONSTANT c_subband_sp_1 : REAL := 99.5; -- Select subband at index 99.5 = 99.5/1024 * 200MHz = 19.43359375 MHz 103 CONSTANT c_wg_ampl_lsb : REAL := c_diag_wg_ampl_unit / c_full_scale_ampl; -- amplitude in number of LSbit resolution steps 104 CONSTANT c_exp_wg_power_sp_0 : REAL := REAL(c_ampl_sp_0**2)/2.0 * REAL(c_sdp_N_fft*c_nof_block_per_sync); 105 106 -- WPFB 107 CONSTANT c_wb_leakage_bin : NATURAL := c_wpfb_sim.nof_points / c_wpfb_sim.wb_factor; -- = 256, leakage will occur in this bin if FIR wb_factor is reversed 108 CONSTANT c_exp_sp_beamlet_power_ratio : REAL := 1.0/8.0; -- depends on internal WPFB quantization and FIR coefficients changed this line in version 2 of the diff
83 CONSTANT c_tb_clk_period : TIME := 100 ps; -- use fast tb_clk to speed up M&C 84 CONSTANT c_cable_delay : TIME := 12 ns; 85 86 CONSTANT c_nof_block_per_sync : NATURAL := 16; 87 CONSTANT c_nof_clk_per_sync : NATURAL := c_nof_block_per_sync*c_sdp_N_fft; 88 CONSTANT c_wpfb_sim : t_wpfb := func_wpfb_set_nof_block_per_sync(c_sdp_wpfb_subbands, c_nof_block_per_sync); 89 CONSTANT c_wpfb_complex_sim : t_wpfb := func_wpfb_map_real_input_wpfb_parameters_to_complex_input(c_wpfb_sim); 90 91 CONSTANT c_percentage : REAL := 0.05; -- percentage that actual value may differ from expected value 92 CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary 93 CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary 94 95 -- WG 96 CONSTANT c_full_scale_ampl : REAL := REAL(2**(14-1)-1); -- = full scale of WG 97 CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values 98 CONSTANT c_ampl_sp_0 : NATURAL := 2**(c_sdp_W_adc-1) / 2; -- in number of lsb changed this line in version 2 of the diff
89 CONSTANT c_wpfb_complex_sim : t_wpfb := func_wpfb_map_real_input_wpfb_parameters_to_complex_input(c_wpfb_sim); 90 91 CONSTANT c_percentage : REAL := 0.05; -- percentage that actual value may differ from expected value 92 CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary 93 CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary 94 95 -- WG 96 CONSTANT c_full_scale_ampl : REAL := REAL(2**(14-1)-1); -- = full scale of WG 97 CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values 98 CONSTANT c_ampl_sp_0 : NATURAL := 2**(c_sdp_W_adc-1) / 2; -- in number of lsb 99 CONSTANT c_wg_subband_freq_unit : REAL := c_diag_wg_freq_unit/REAL(c_sdp_N_fft); -- subband freq = Fs/1024 = 200 MSps/1024 = 195312.5 Hz sinus 100 CONSTANT c_wg_freq_offset : REAL := 0.0/11.0; -- in freq_unit 101 CONSTANT c_subband_sp_0 : REAL := 102.0; -- Select subband at index 102 = 102/1024 * 200MHz = 19.921875 MHz 102 CONSTANT c_subband_sp_1 : REAL := 99.5; -- Select subband at index 99.5 = 99.5/1024 * 200MHz = 19.43359375 MHz 103 CONSTANT c_wg_ampl_lsb : REAL := c_diag_wg_ampl_unit / c_full_scale_ampl; -- amplitude in number of LSbit resolution steps 104 CONSTANT c_exp_wg_power_sp_0 : REAL := REAL(c_ampl_sp_0**2)/2.0 * REAL(c_sdp_N_fft*c_nof_block_per_sync); changed this line in version 2 of the diff
92 CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary 93 CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary 94 95 -- WG 96 CONSTANT c_full_scale_ampl : REAL := REAL(2**(14-1)-1); -- = full scale of WG 97 CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values 98 CONSTANT c_ampl_sp_0 : NATURAL := 2**(c_sdp_W_adc-1) / 2; -- in number of lsb 99 CONSTANT c_wg_subband_freq_unit : REAL := c_diag_wg_freq_unit/REAL(c_sdp_N_fft); -- subband freq = Fs/1024 = 200 MSps/1024 = 195312.5 Hz sinus 100 CONSTANT c_wg_freq_offset : REAL := 0.0/11.0; -- in freq_unit 101 CONSTANT c_subband_sp_0 : REAL := 102.0; -- Select subband at index 102 = 102/1024 * 200MHz = 19.921875 MHz 102 CONSTANT c_subband_sp_1 : REAL := 99.5; -- Select subband at index 99.5 = 99.5/1024 * 200MHz = 19.43359375 MHz 103 CONSTANT c_wg_ampl_lsb : REAL := c_diag_wg_ampl_unit / c_full_scale_ampl; -- amplitude in number of LSbit resolution steps 104 CONSTANT c_exp_wg_power_sp_0 : REAL := REAL(c_ampl_sp_0**2)/2.0 * REAL(c_sdp_N_fft*c_nof_block_per_sync); 105 106 -- WPFB 107 CONSTANT c_wb_leakage_bin : NATURAL := c_wpfb_sim.nof_points / c_wpfb_sim.wb_factor; -- = 256, leakage will occur in this bin if FIR wb_factor is reversed changed this line in version 2 of the diff
177 SIGNAL INTA : STD_LOGIC; 178 SIGNAL INTB : STD_LOGIC; 179 180 SIGNAL eth_clk : STD_LOGIC := '0'; 181 SIGNAL eth_txp : STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 downto 0); 182 SIGNAL eth_rxp : STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 downto 0); 183 184 SIGNAL sens_scl : STD_LOGIC; 185 SIGNAL sens_sda : STD_LOGIC; 186 SIGNAL pmbus_scl : STD_LOGIC; 187 SIGNAL pmbus_sda : STD_LOGIC; 188 189 SIGNAL SA_CLK : STD_LOGIC := '1'; 190 SIGNAL si_lpbk_0 : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0); 191 192 changed this line in version 2 of the diff
309 tb_clk <= NOT tb_clk AFTER c_tb_clk_period/2; -- Testbench MM clock 310 311 p_mm_stimuli : PROCESS 312 VARIABLE v_bsn : NATURAL; 313 VARIABLE v_sp_power_sum_0 : REAL; 314 VARIABLE v_sp_beamlet_power : REAL; 315 VARIABLE v_sp_subband_power : REAL; 316 VARIABLE v_W, v_T, v_U, v_S, v_B : NATURAL; -- array indicies 317 VARIABLE v_beamlet_index_offset : NATURAL; 318 BEGIN 319 -- Wait for DUT power up after reset 320 WAIT FOR 1 us; 321 322 proc_common_wait_until_hi_lo(ext_clk, ext_pps); 323 324 changed this line in version 2 of the diff
132 SIGNAL sim_done : STD_LOGIC := '0'; 133 SIGNAL tb_clk : STD_LOGIC := '0'; 134 SIGNAL rd_data : STD_LOGIC_VECTOR(c_32-1 DOWNTO 0); 135 136 -- WG 137 SIGNAL dbg_c_exp_wg_power_sp_0 : REAL := c_exp_wg_power_sp_0; 138 SIGNAL sp_samples : t_integer_arr(0 TO c_mon_buffer_nof_samples-1) := (OTHERS=>0); 139 SIGNAL sp_sample : INTEGER := 0; 140 SIGNAL sp_power_sum : STD_LOGIC_VECTOR(63 DOWNTO 0); 141 SIGNAL current_bsn_wg : STD_LOGIC_VECTOR(c_dp_stream_bsn_w-1 DOWNTO 0); 142 143 -- WPFB 144 SIGNAL sp_subband_powers_arr2 : t_slv_64_subbands_arr(c_sdp_N_beamsets*c_sdp_N_pol-1 DOWNTO 0); -- [sp][sub] 145 146 SIGNAL sp_beamlet_powers_arr2 : t_slv_64_subbands_arr(c_sdp_N_beamsets*c_sdp_N_pol-1 DOWNTO 0); -- [sp][sub] 147 SIGNAL sp_beamlet_power_0 : REAL; changed this line in version 2 of the diff
1 ------------------------------------------------------------------------------- 2 -- 3 -- Copyright 2020 changed this line in version 2 of the diff
27 -- MM control actions: 28 -- 29 -- 1) Enable calc mode for WG via reg_diag_wg with: 30 -- 1. 31 -- freq = 19.921875MHz (subband 102) 32 -- ampl = 0.5 * 2**13 33 -- 2. 34 -- freg = 19.43359375 MHz (subband 99.5) 35 -- ampl = 0.5 * 2**13 36 -- 37 -- 2) Read current BSN from reg_bsn_scheduler_wg and write reg_bsn_scheduler_wg 38 -- to trigger start of WG at BSN. 39 -- 40 -- 3) Verify 10GbE output. 41 -- 42 -- mentioned in commit 090e35b0
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